mb/google/dedede: Read DRAM population strap

Configure DRAM population strap GPIO according to the schematics.
Configure an internal pull-up to support the boards in which the strap
is not populated. Read the strap and pass that information to FSP for
memory initialization.

BUG=b:152275658, b:154301008
TEST=Build and boot the mainboard. Ensure that the strap information is
read as expected and passed to FSP.

Change-Id: I69583f35ffc219bae9ce06bd4ba9898ed0d4d21d
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39812
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/dedede/romstage.c

@@ -6,8 +6,10 @@
  */
 
 #include <baseboard/variants.h>
+#include <gpio.h>
 #include <soc/meminit.h>
 #include <soc/romstage.h>
+#include <variant/gpio.h>
 
 void mainboard_memory_init_params(FSPM_UPD *memupd)
 {
@@ -16,7 +18,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
 		.read_type = READ_SPD_CBFS,
 		.spd_spec.spd_index = variant_memory_sku(),
 	};
-	/* TODO: Read the resistor strap to get number of memory segments. */
-	bool half_populated = 0;
+	bool half_populated = !gpio_get(GPIO_MEM_CH_SEL);
+
 	memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated);
 }

src/mainboard/google/dedede/variants/baseboard/gpio.c

@@ -348,7 +348,7 @@ static const struct pad_config gpio_table[] = {
 
 
 	/* S0  : RAM_STRAP_4 */
-	PAD_NC(GPP_S0, NONE),
+	PAD_CFG_GPI(GPP_S0, UP_5K, DEEP),
 	/* S1  : RSVD_STRAP */
 	PAD_NC(GPP_S1, NONE),
 	/* S2  : DMIC1_CLK */
@@ -416,6 +416,9 @@ static const struct pad_config early_gpio_table[] = {
 
 	/* H19 : BT_DISABLE_L */
 	PAD_CFG_GPO(GPP_H19, 0, DEEP),
+
+	/* S0  : RAM_STRAP_4 */
+	PAD_CFG_GPI(GPP_S0, UP_5K, DEEP),
 };
 
 const struct pad_config *__weak variant_gpio_table(size_t *num)

src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h

@@ -26,4 +26,7 @@
 #define GPIO_MEM_CONFIG_2	GPP_C4
 #define GPIO_MEM_CONFIG_3	GPP_C5
 
+/* Memory channel select strap - 0: half-populated, 1: fully-populated */
+#define GPIO_MEM_CH_SEL		GPP_S0
+
 #endif /* __BASEBOARD_GPIO_H__ */