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mb/intel/jasperlake_rvp: Add SD Card gpio config for JSLRVP 

Configure write protect and card detect SD Card GPIO for JSLRVP
as per schematics.

BUG=None
BRANCH=None
TEST=Build, boot JSLRVP and verified SD Card detection.
Change-Id: I8114d6980a2a542538b05f812ca2cffc15c88c22
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39492
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ronak Kanabar 2020-03-13 12:13:54 +05:30 committed by Patrick Georgi
parent c42cf911ad
commit da42724549
2 changed files with 12 additions and 0 deletions
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3
src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
View File

@ -124,6 +124,9 @@ chip soc/intel/jasperlake
# Enable S0ix # Enable S0ix
register "s0ix_enable" = "1" register "s0ix_enable" = "1"
# GPIO for SD card detect
register "sdcard_cd_gpio" = "VGPIO_39"
register "common_soc_config" = "{ register "common_soc_config" = "{
.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
.gspi[1] = { .gspi[1] = {

9
src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
View File

@ -19,6 +19,15 @@ static const struct pad_config gpio_table[] = {
/* I2S_MCLK */ /* I2S_MCLK */
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
/* SD_CD# */
PAD_CFG_NF(GPP_G5, UP_20K, PWROK, NF1),
/* SD_WP */
PAD_CFG_NF(GPP_G7, DN_20K, PWROK, NF1),
/* virtual GPIO for SD card detect */
PAD_CFG_GPI_GPIO_DRIVER(VGPIO_39, NONE, DEEP),
/* I2S1_SCLK */ /* I2S1_SCLK */
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),