soc/intel/cmn/cse: Create API to get CSE Lite WP Information
This patch creates an API for CSE-Lite specific SKU to retrieve the Write Protect (WP) information (`cse_log_ro_write_protection_info`) like WP range and limit, if the region is write-protected or not etc. BUG=none TEST=Able to compile the cse_lite.c file for google/kano without any error. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I8f4b7880534ded5401b6f8d601ded88019c636c8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69968 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -10,6 +10,7 @@
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#include <intelbasecode/debug_feature.h>
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#include <intelblocks/cse.h>
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#include <intelblocks/cse_layout.h>
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#include <intelblocks/spi.h>
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#include <security/vboot/misc.h>
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#include <security/vboot/vboot_common.h>
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#include <soc/intel/common/reset.h>
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@ -133,6 +134,28 @@ struct get_bp_info_rsp {
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static const char * const cse_regions[] = {"RO", "RW"};
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void cse_log_ro_write_protection_info(bool mfg_mode)
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{
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bool cse_ro_wp_en = is_spi_wp_cse_ro_en();
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printk(BIOS_DEBUG, "ME: WP for RO is enabled : %s\n",
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cse_ro_wp_en ? "YES" : "NO");
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if (cse_ro_wp_en) {
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uint32_t base, limit;
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spi_get_wp_cse_ro_range(&base, &limit);
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printk(BIOS_DEBUG, "ME: RO write protection scope - Start=0x%X, End=0x%X\n",
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base, limit);
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}
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/*
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* If manufacturing mode is disabled, but CSE RO is not write protected,
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* log error.
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*/
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if (!mfg_mode && !cse_ro_wp_en)
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printk(BIOS_ERR, "ME: Write protection for CSE RO is not enabled\n");
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}
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bool cse_get_boot_performance_data(struct cse_boot_perf_rsp *boot_perf_rsp)
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{
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struct cse_boot_perf_req {
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@ -555,4 +555,7 @@ void soc_disable_heci1_using_pcr(void);
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*/
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void cse_get_telemetry_data(void);
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/* Function to log the cse WP information like range, if WP etc. */
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void cse_log_ro_write_protection_info(bool mfg_mode);
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#endif // SOC_INTEL_COMMON_CSE_H
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