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This patch allows the RCA RM4100 to reboot. Upon rebooting in auto.c it detects if the memory is already initialized, if so it issues a hard reset through the southbridge. 

Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Joseph Smith 2008-05-15 13:44:33 +00:00 committed by Joseph Smith
parent e3da00de8d
commit da69582ce4
2 changed files with 38 additions and 1 deletions
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9
src/mainboard/rca/rm4100/auto.c
View File

@ -33,7 +33,9 @@
#include "ram/ramtest.c" #include "ram/ramtest.c"
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82830/raminit.h" #include "northbridge/intel/i82830/raminit.h"
#include "northbridge/intel/i82830/memory_initialized.c"
#include "southbridge/intel/i82801xx/i82801xx.h" #include "southbridge/intel/i82801xx/i82801xx.h"
#include "southbridge/intel/i82801xx/i82801xx_reset.c"
#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#include "spd_table.h" #include "spd_table.h"
@ -95,6 +97,9 @@ static void main(unsigned long bist)
if (bist == 0) if (bist == 0)
early_mtrr_init(); early_mtrr_init();
if (memory_initialized()) {
hard_reset();
}
enable_smbus(); enable_smbus();
@ -103,6 +108,9 @@ static void main(unsigned long bist)
uart_init(); uart_init();
console_init(); console_init();
/* Prevent the TCO timer from rebooting us */
i82801xx_halt_tco_timer();
/* Halt if there was a built in self test failure. */ /* Halt if there was a built in self test failure. */
report_bist_failure(bist); report_bist_failure(bist);
@ -114,6 +122,5 @@ static void main(unsigned long bist)
/* ram_check(0, 640 * 1024); */ /* ram_check(0, 640 * 1024); */
/* ram_check(130048 * 1024, 131072 * 1024); */ /* ram_check(130048 * 1024, 131072 * 1024); */
i82801xx_halt_tco_timer();
ac97_io_enable(); ac97_io_enable();
} }

30
src/northbridge/intel/i82830/memory_initialized.c Normal file
View File

@ -0,0 +1,30 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "i82830.h"
#define NB_DEV PCI_DEV(0, 0, 0)
static inline int memory_initialized(void)
{
u32 drc;
drc = pci_read_config32(NB_DEV, DRC);
return (drc & (1<<29));
}