From da70cb50c26235c6b49ec58c8fdc03af42ab97df Mon Sep 17 00:00:00 2001 From: Tarun Tuli Date: Mon, 29 Aug 2022 15:43:21 -0400 Subject: [PATCH] mb/google/rex: Change GPP_A17 programming To match byra commit 7c2514fc072f95eed6483518811fb6c39f780f5b (mb/google/brya: Change GPP_F17 programming), update A17 pad configuration to the APIC only. TEST=Verified booting to OS on Google/Rex. Signed-off-by: Tarun Tuli Change-Id: Ie9f071dc4a2755dd1f396e2afe730ead66bb1dd0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67183 Reviewed-by: Kapil Porwal Reviewed-by: Eric Lai Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/mainboard/google/rex/variants/rex0/gpio.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c index 75e40622cd..8f4ea6c543 100644 --- a/src/mainboard/google/rex/variants/rex0/gpio.c +++ b/src/mainboard/google/rex/variants/rex0/gpio.c @@ -34,7 +34,8 @@ static const struct pad_config gpio_table_id0[] = { PAD_CFG_GPO(GPP_A15, 1, DEEP), /* GPP_A16 : GPP_A16 ==> ESPI_SOC_ALERT_L configured on reset, do not touch */ /* GPP_A17 : [] ==> EC_SOC_INT_ODL */ - PAD_CFG_GPI_IRQ_WAKE(GPP_A17, NONE, PLTRST, LEVEL, INVERT), + PAD_CFG_GPI_APIC_LOCK(GPP_A17, NONE, LEVEL, INVERT, LOCK_CONFIG), + /* GPP_A18 : [] ==> CAM_PSW_L */ PAD_CFG_GPI_INT_LOCK(GPP_A18, NONE, EDGE_BOTH, LOCK_CONFIG), /* GPP_A19 : [] ==> EN_PP3300_SSD */ @@ -388,9 +389,6 @@ static const struct pad_config early_gpio_table_id0[] = { /* GPP_E13 : [] ==> MEM_CH_SEL */ PAD_CFG_GPI(GPP_E13, NONE, DEEP), - /* GPP_A17 : [] ==> EC_SOC_INT_ODL */ - PAD_CFG_GPI_APIC_LOCK(GPP_A17, NONE, LEVEL, INVERT, LOCK_CONFIG), - /* GPP_A20 : [] ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_A20, 0, DEEP),