diff --git a/src/cpu/amd/agesa/heapmanager.c b/src/cpu/amd/agesa/heapmanager.c
index 087959dc61..9acd0bd6fc 100644
--- a/src/cpu/amd/agesa/heapmanager.c
+++ b/src/cpu/amd/agesa/heapmanager.c
@@ -17,7 +17,7 @@
 #include "heapManager.h"
 
 #include <cbmem.h>
-#include <cpu/amd/agesa/s3_resume.h>
+#include <northbridge/amd/agesa/agesa_helper.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 
 #include <arch/acpi.h>
diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index 1e4aadbed7..f45ff3c3e1 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -25,6 +25,7 @@
 #include <string.h>
 #include <halt.h>
 #include "s3_resume.h"
+#include <northbridge/amd/agesa/agesa_helper.h>
 
 static void move_stack_high_mem(void)
 {
diff --git a/src/cpu/amd/agesa/s3_resume.h b/src/cpu/amd/agesa/s3_resume.h
index ff2396678b..b10489eeef 100644
--- a/src/cpu/amd/agesa/s3_resume.h
+++ b/src/cpu/amd/agesa/s3_resume.h
@@ -22,20 +22,4 @@ void prepare_for_resume(void);
 void backup_mtrr(void *mtrr_store, u32 *mtrr_store_size);
 const void *OemS3Saved_MTRR_Storage(void);
 
-void *GetHeapBase(void);
-void EmptyHeap(void);
-void ResumeHeap(void **heap, size_t *len);
-
-#define BSP_STACK_BASE_ADDR		0x30000
-
-#if 1
-/* This covers node 0 only. */
-#define HIGH_ROMSTAGE_STACK_SIZE	(0x48000 - BSP_STACK_BASE_ADDR)
-#else
-/* This covers total of 8 nodes. */
-#define HIGH_ROMSTAGE_STACK_SIZE	(0xA0000 - BSP_STACK_BASE_ADDR)
-#endif
-
-#define HIGH_MEMORY_SCRATCH		0x30000
-
 #endif
diff --git a/src/northbridge/amd/agesa/agesa_helper.h b/src/northbridge/amd/agesa/agesa_helper.h
index 73f927e576..82963c1f04 100644
--- a/src/northbridge/amd/agesa/agesa_helper.h
+++ b/src/northbridge/amd/agesa/agesa_helper.h
@@ -16,6 +16,8 @@
 #ifndef _AGESA_HELPER_H_
 #define _AGESA_HELPER_H_
 
+#include <stddef.h>
+
 enum {
 	PICK_DMI,       /* DMI Interface */
 	PICK_PSTATE,    /* Acpi Pstate SSDT Table */
@@ -33,4 +35,21 @@ void amd_initcpuio(void);
 void amd_initmmio(void);
 void amd_initenv(void);
 
+void *GetHeapBase(void);
+void EmptyHeap(void);
+void ResumeHeap(void **heap, size_t *len);
+
+#define BSP_STACK_BASE_ADDR		0x30000
+
+#if 1
+/* This covers node 0 only. */
+#define HIGH_ROMSTAGE_STACK_SIZE	(0x48000 - BSP_STACK_BASE_ADDR)
+#else
+/* This covers total of 8 nodes. */
+#define HIGH_ROMSTAGE_STACK_SIZE	(0xA0000 - BSP_STACK_BASE_ADDR)
+#endif
+
+#define HIGH_MEMORY_SCRATCH		0x30000
+
+
 #endif /* _AGESA_HELPER_H_ */
diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c
index c7d23ff346..a9504acb05 100644
--- a/src/northbridge/amd/agesa/oem_s3.c
+++ b/src/northbridge/amd/agesa/oem_s3.c
@@ -21,6 +21,7 @@
 #include <cpu/amd/agesa/s3_resume.h>
 #include <northbridge/amd/agesa/agesawrapper.h>
 #include <AGESA.h>
+#include <northbridge/amd/agesa/agesa_helper.h>
 
 typedef enum {
 	S3DataTypeNonVolatile = 0,	///< NonVolatile Data Type
diff --git a/src/southbridge/amd/agesa/hudson/agesawrapper.c b/src/southbridge/amd/agesa/hudson/agesawrapper.c
index 0c0deffcb4..0da792c658 100644
--- a/src/southbridge/amd/agesa/hudson/agesawrapper.c
+++ b/src/southbridge/amd/agesa/hudson/agesawrapper.c
@@ -16,6 +16,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <cpu/x86/mtrr.h>
+#include <northbridge/amd/agesa/agesa_helper.h>
 #include <northbridge/amd/agesa/agesawrapper.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include "cpuRegisters.h"
@@ -30,7 +31,6 @@
 #include "heapManager.h"
 #include "FchPlatform.h"
 #include "Fch.h"
-#include <cpu/amd/agesa/s3_resume.h>
 #include <arch/io.h>
 #include <device/device.h>
 #include "hudson.h"