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mb/asus/p8h61-m_pro/devicetree.cb: Drop zero fields 

They default to zero already.

Change-Id: I5c99043f16bc65de952afa0ce8d40bf947bfee15
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-01-01 19:04:55 +01:00 committed by Nico Huber
parent e1484e4b3e
commit dad7f37f72
1 changed files with 0 additions and 2 deletions
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src/mainboard/asus/p8h61-m_pro/devicetree.cb
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@ -32,9 +32,7 @@ chip northbridge/intel/sandybridge
device domain 0x0 on device domain 0x0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065" register "c2_latency" = "0x0065"
register "docking_supported" = "0"
register "gen1_dec" = "0x000c0291" # HWM register "gen1_dec" = "0x000c0291" # HWM
register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
register "sata_interface_speed_support" = "0x3" register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x33" register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"