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soc/intel/common/gpio: Add PAD_CFG_GPI_SCI_LOW/HIGH_LOCK macro 

Add PAD_CFG_GPI_SCI_LOW_LOCK and PAD_CFG_GPI_SCI_HIGH_LOCK macro
to support mainboard to lock NC and GPI_SCI pins as applicable.

BUG=b:216583542
TEST=build passed

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I5060777cc09af6cb3144ad799154e77167521de3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Eric Lai 2022-04-12 10:36:41 +08:00 committed by Felix Held
parent 32e1022611
commit daed4ea1d0
1 changed files with 6 additions and 0 deletions
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6
src/soc/intel/common/block/include/intelblocks/gpio_defs.h
View File

@ -452,9 +452,15 @@
#define PAD_CFG_GPI_SCI_LOW(pad, pull, rst, trig) \
PAD_CFG_GPI_SCI(pad, pull, rst, trig, INVERT)
#define PAD_CFG_GPI_SCI_LOW_LOCK(pad, pull, trig, lock_action) \
PAD_CFG_GPI_SCI_LOCK(pad, pull, trig, INVERT, lock_action)
#define PAD_CFG_GPI_SCI_HIGH(pad, pull, rst, trig) \
PAD_CFG_GPI_SCI(pad, pull, rst, trig, NONE)
#define PAD_CFG_GPI_SCI_HIGH_LOCK(pad, pull, trig, lock_action) \
PAD_CFG_GPI_SCI_LOCK(pad, pull, trig, NONE, lock_action)
#define PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, inv, dur) \
_PAD_CFG_STRUCT_3(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \