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via/vx900: Plumber registered DIMM to right place. 

Currently due to enum mistake DDR3 = 0xb was confused with DIMM type and
interpreted as LRDIMM, considered unregistered and so every RAM was
unregistered.
Registered RAM is rarely used, so I suppose the code was never tested with them.
For unregistered RAM exactly the same codepath is followed.

Change-Id: I02fe8b1fd7be3bd382399ffa0eb513965a2a6d77
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7687
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Vladimir Serbinenko 2014-12-07 13:58:15 +01:00
parent 0e675f72da
commit daf7680805
2 changed files with 5 additions and 2 deletions
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1
src/northbridge/via/vx900/raminit.h
View File

@ -71,6 +71,7 @@ typedef struct vx900_delay_calib_st {
typedef struct ramctr_timing_st {
enum spd_memory_type dram_type;
enum spd_dimm_type dimm_type;
u16 cas_supported;
/* tLatencies are in units of ns, scaled by x256 */
u32 tCK;

6
src/northbridge/via/vx900/raminit_ddr3.c
View File

@ -369,9 +369,11 @@ static void dram_find_common_params(const dimm_info * dimms,
if (valid_dimms == 1) {
/* First DIMM defines the type of DIMM */
ctrl->dram_type = dimm->dram_type;
ctrl->dimm_type = dimm->dimm_type;
} else {
/* Check if we have mismatched DIMMs */
if (ctrl->dram_type != dimm->dram_type)
if (ctrl->dram_type != dimm->dram_type
|| ctrl->dimm_type != dimm->dimm_type)
die("Mismatched DIMM Types");
}
/* Find all possible CAS combinations */
@ -705,7 +707,7 @@ static void vx900_dram_freq(ramctr_timing * ctrl)
pci_mod_config8(MCU, 0x6b, 0x80, 0x00);
/* Step 8 - If we have registered DIMMs, we need to set bit[0] */
if (dimm_is_registered(ctrl->dram_type)) {
if (dimm_is_registered(ctrl->dimm_type)) {
printram("Enabling RDIMM support in memory controller\n");
pci_mod_config8(MCU, 0x6c, 0x00, 0x01);
}