via/vx900: Plumber registered DIMM to right place.
Currently due to enum mistake DDR3 = 0xb was confused with DIMM type and interpreted as LRDIMM, considered unregistered and so every RAM was unregistered. Registered RAM is rarely used, so I suppose the code was never tested with them. For unregistered RAM exactly the same codepath is followed. Change-Id: I02fe8b1fd7be3bd382399ffa0eb513965a2a6d77 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7687 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
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@ -71,6 +71,7 @@ typedef struct vx900_delay_calib_st {
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typedef struct ramctr_timing_st {
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typedef struct ramctr_timing_st {
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enum spd_memory_type dram_type;
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enum spd_memory_type dram_type;
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enum spd_dimm_type dimm_type;
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u16 cas_supported;
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u16 cas_supported;
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/* tLatencies are in units of ns, scaled by x256 */
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/* tLatencies are in units of ns, scaled by x256 */
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u32 tCK;
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u32 tCK;
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@ -369,9 +369,11 @@ static void dram_find_common_params(const dimm_info * dimms,
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if (valid_dimms == 1) {
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if (valid_dimms == 1) {
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/* First DIMM defines the type of DIMM */
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/* First DIMM defines the type of DIMM */
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ctrl->dram_type = dimm->dram_type;
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ctrl->dram_type = dimm->dram_type;
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ctrl->dimm_type = dimm->dimm_type;
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} else {
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} else {
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/* Check if we have mismatched DIMMs */
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/* Check if we have mismatched DIMMs */
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if (ctrl->dram_type != dimm->dram_type)
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if (ctrl->dram_type != dimm->dram_type
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|| ctrl->dimm_type != dimm->dimm_type)
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die("Mismatched DIMM Types");
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die("Mismatched DIMM Types");
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}
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}
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/* Find all possible CAS combinations */
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/* Find all possible CAS combinations */
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@ -705,7 +707,7 @@ static void vx900_dram_freq(ramctr_timing * ctrl)
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pci_mod_config8(MCU, 0x6b, 0x80, 0x00);
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pci_mod_config8(MCU, 0x6b, 0x80, 0x00);
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/* Step 8 - If we have registered DIMMs, we need to set bit[0] */
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/* Step 8 - If we have registered DIMMs, we need to set bit[0] */
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if (dimm_is_registered(ctrl->dram_type)) {
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if (dimm_is_registered(ctrl->dimm_type)) {
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printram("Enabling RDIMM support in memory controller\n");
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printram("Enabling RDIMM support in memory controller\n");
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pci_mod_config8(MCU, 0x6c, 0x00, 0x01);
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pci_mod_config8(MCU, 0x6c, 0x00, 0x01);
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}
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}
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