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soc/intel/common/systemagent: Add Kconfig guard 

Looks like selecting SOC_INTEL_COMMON force-sets MMCONF_BASE_ADDR to
some value which can't be overriden outside of soc/intel/common. So
adding a non-SoC platform thats uses code from soc/intel/common is not
possible.

TEST=build test on wip platform

Change-Id: Ia160444e8ac7cac55153f659f4d98f4f77f0d467
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38639
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
This commit is contained in:
Andrey Petrov 2019-12-30 09:58:47 -08:00
parent b729d8b6e3
commit dafd514d30
2 changed files with 8 additions and 0 deletions
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4
src/soc/intel/common/block/systemagent/Kconfig
View File

@ -3,6 +3,8 @@ config SOC_INTEL_COMMON_BLOCK_SA
help help
Intel Processor common System Agent support Intel Processor common System Agent support
if SOC_INTEL_COMMON_BLOCK_SA
config MMCONF_BASE_ADDRESS config MMCONF_BASE_ADDRESS
hex hex
default 0xe0000000 default 0xe0000000
@ -36,3 +38,5 @@ config SA_ENABLE_DPR
default n default n
help help
This option allows you to add the DMA Protected Range (DPR). This option allows you to add the DMA Protected Range (DPR).
endif

4
src/soc/intel/denverton_ns/Kconfig
View File

@ -54,6 +54,10 @@ config CPU_SPECIFIC_OPTIONS
select UDK_2015_BINDING select UDK_2015_BINDING
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
config MMCONF_BASE_ADDRESS
hex
default 0xe0000000
config FSP_T_ADDR config FSP_T_ADDR
hex "Intel FSP-T (temp ram init) binary location" hex "Intel FSP-T (temp ram init) binary location"
depends on ADD_FSP_BINARIES && FSP_CAR depends on ADD_FSP_BINARIES && FSP_CAR