skylake: Move ACPI init to SOC instead of mainboard

Move some remaining ACPI init code to the SOC instead of being
done in each mainboard:

- acpi_create_gnvs is now a local function
- add a weak acpi_mainboard_gnvs() that can be used for mainboards
to override or set additional NVS
- add acpi_fill_madt() function for skylake
- remove acpi_create_serialio_ssdt() function as it is unused

BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: I52225e8d38ed846c29d44872e3f4d6ebaf4a7e52
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c717bb418a0cb6002582572632e42b44b473f718
Original-Change-Id: I0910ac8ef25de265ae1fde16b68f6cbacedb4462
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297800
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11581
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2015-09-04 14:19:35 -07:00 committed by Patrick Georgi
parent 5f3ea3b77e
commit db54a67b76
3 changed files with 17 additions and 7 deletions

View File

@ -22,6 +22,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <chip.h>
@ -167,7 +168,7 @@ static int get_cores_per_package(void)
return cores;
}
void acpi_init_gnvs(global_nvs_t *gnvs)
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
const struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC);
const struct soc_intel_skylake_config *config = dev->chip_info;
@ -204,6 +205,18 @@ unsigned long acpi_fill_mcfg(unsigned long current)
return current;
}
unsigned long acpi_fill_madt(unsigned long current)
{
/* Local APICs */
current = acpi_create_madt_lapics(current);
/* IOAPIC */
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
2, IO_APIC_ADDR, 0);
return acpi_madt_irq_overrides(current);
}
void acpi_fill_in_fadt(acpi_fadt_t *fadt)
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
@ -550,7 +563,6 @@ unsigned long southcluster_write_acpi_tables(device_t device,
ssdt2 = (acpi_header_t *)current;
memset(ssdt2, 0, sizeof(acpi_header_t));
acpi_create_serialio_ssdt(ssdt2);
if (ssdt2->length) {
current += ssdt2->length;
acpi_add_table(rsdp, ssdt2);
@ -580,6 +592,7 @@ void southcluster_inject_dsdt(device_t device)
if (gnvs) {
acpi_create_gnvs(gnvs);
acpi_mainboard_gnvs(gnvs);
acpi_save_gnvs((unsigned long)gnvs);
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
@ -591,6 +604,6 @@ void southcluster_inject_dsdt(device_t device)
}
}
__attribute__((weak)) void acpi_create_serialio_ssdt(acpi_header_t *ssdt)
__attribute__((weak)) void acpi_mainboard_gnvs(global_nvs_t *gnvs)
{
}

View File

@ -30,10 +30,9 @@
#define PSS_LATENCY_TRANSITION 10
#define PSS_LATENCY_BUSMASTER 10
void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
void acpi_fill_in_fadt(acpi_fadt_t *fadt);
unsigned long acpi_madt_irq_overrides(unsigned long current);
void acpi_init_gnvs(global_nvs_t *gnvs);
void acpi_mainboard_gnvs(global_nvs_t *gnvs);
void southcluster_inject_dsdt(device_t device);
unsigned long southcluster_write_acpi_tables(device_t device,
unsigned long current, struct acpi_rsdp *rsdp);

View File

@ -62,8 +62,6 @@ typedef struct {
chromeos_acpi_t chromeos;
} __attribute__((packed)) global_nvs_t;
void acpi_create_gnvs(global_nvs_t *gnvs);
#if ENV_SMM
/* Used in SMM to find the ACPI GNVS address */
global_nvs_t *smm_get_gnvs(void);