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cpu/x86/smm: Don't save EFER 

The EFER MSR is in the SMM save state and RSM properly restores it.
Returning to 32bit mode was only done so that fxsave was done in the
same mode as fxrstor, but this is no longer done.

See commit 1efca4d570 (cpu/x86/smm: Drop fxsave/fxrstor logic)

TESTED on qemu: the smihandler works fine.

Change-Id: Ie0e9584afd1f08f51ca57da5c4350042699f130d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68895
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Arthur Heymans 2022-10-26 11:49:32 +02:00 committed by Felix Held
parent 563f7afa04
commit db766c702a
1 changed files with 6 additions and 39 deletions
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45
src/cpu/x86/smm/smm_stub.S
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@ -183,37 +183,22 @@ apicid_end:
movl $0, 4(%ebx)
#endif
/* Create stack frame by pushing a NULL stack base pointer */
pushl $0x0
mov %esp, %ebp
/* Allocate locals (efer_backup) */
subl $0x8, %esp
align_stack:
/* Align stack to 16 bytes. Another 32 bytes are pushed below. */
andl $0xfffffff0, %esp
#if ENV_X86_64
mov %ecx, %edi
/* Backup IA32_EFER. Preserves ebx. */
movl $(IA32_EFER), %ecx
rdmsr
movl %eax, -0x4(%ebp)
movl %edx, -0x8(%ebp)
/* entry64.inc preserves ebx, esi, edi, ebp */
#include <cpu/x86/64bit/entry64.inc>
mov %edi, %ecx
#endif
/* Call into the c-based SMM relocation function with the platform
* parameters. Equivalent to:
* struct arg = { cpu_num, canary };
* c_handler(&arg)
*/
#if ENV_X86_64
mov %ecx, %edi
/* entry64.inc preserves ebx, esi, edi, ebp */
#include <cpu/x86/64bit/entry64.inc>
mov %edi, %ecx
push %rbx /* uintptr_t *canary */
push %rcx /* size_t cpu */
@ -221,24 +206,6 @@ align_stack:
movabs c_handler, %eax
call *%rax
/*
* The only reason to go back to protected mode is that RSM doesn't restore
* MSR registers and MSR IA32_EFER was modified by entering long mode.
* Drop to protected mode to safely operate on the IA32_EFER MSR.
*/
/* Disable long mode. */
#include <cpu/x86/64bit/exit32.inc>
/* Restore IA32_EFER as RSM doesn't restore MSRs. */
movl $(IA32_EFER), %ecx
rdmsr
movl -0x4(%ebp), %eax
movl -0x8(%ebp), %edx
wrmsr
#else
push $0x0 /* Padding */
push %ebx /* uintptr_t *canary */