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Add AMD family 10 AM2r2 support. 

Coreboot used to take SYSTEM_TYPE as a lable to tell what the socket is.

This patch replaces (some of, not all) CONFIG_SYSTEM_TYPE with CONFIG_SOCKET_TYPE.
It also fix some compiling error in src/northbridge/amd/amdmct/mct/mctardk4.c


Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Zheng Bao 2009-07-01 07:01:32 +00:00 committed by Zheng Bao
parent 9dd27bc03a
commit db8b4114ff
6 changed files with 137 additions and 34 deletions
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54
src/cpu/amd/socket_AM2r2/Config.lb Normal file
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@ -0,0 +1,54 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2007 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
uses CONFIG_PCI_IO_CFG_EXT
uses CONFIG_MMCONF_SUPPORT
uses CONFIG_HT3_SUPPORT
uses CONFIG_EXT_RT_TBL_SUPPORT
uses CONFIG_EXT_CONF_SUPPORT
uses CONFIG_DIMM_SUPPORT
uses CONFIG_CPU_SOCKET_TYPE
uses CONFIG_CBB
uses CONFIG_CDB
uses CONFIG_PCI_BUS_SEGN_BITS
uses CONFIG_CAR_FAM10
config chip.h
default CONFIG_PCI_IO_CFG_EXT=1
default CONFIG_HT3_SUPPORT=1
default CONFIG_EXT_RT_TBL_SUPPORT=0
default CONFIG_EXT_CONF_SUPPORT=0
default CONFIG_DIMM_SUPPORT=0x0104 #DDR2 and REG
default CONFIG_CPU_SOCKET_TYPE=0x11
default CONFIG_CAR_FAM10=1
if CONFIG_EXT_RT_TBL_SUPPORT
default CONFIG_CBB=0xff
default CONFIG_CDB=0
end
#default CONFIG_MMCONF_SUPPORT=1
#default CONFIG_MMCONF_SUPPORT_DEFAULT=1
object socket_AM2r2.o
dir /cpu/amd/model_10xxx

23
src/cpu/amd/socket_AM2r2/chip.h Normal file
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@ -0,0 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations cpu_amd_socket_AM2r2_ops;
struct cpu_amd_socket_AM2r2_config {
};

25
src/cpu/amd/socket_AM2r2/socket_AM2r2.c Normal file
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@ -0,0 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_AM2r2_ops = {
CHIP_NAME("socket AM2r2")
};

4
src/northbridge/amd/amdfam10/raminit_amdmct.c
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@ -63,10 +63,10 @@ static void print_t(const char *strval)
#include "../amdmct/mct/mctndi_d.c" #include "../amdmct/mct/mctndi_d.c"
#include "../amdmct/mct/mctchi_d.c" #include "../amdmct/mct/mctchi_d.c"
#if SYSTEM_TYPE == SERVER #if CONFIG_CPU_SOCKET_TYPE == 0x10
//L1 //L1
#include "../amdmct/mct/mctardk3.c" #include "../amdmct/mct/mctardk3.c"
#elif SYSTEM_TYPE == DESKTOP #elif CONFIG_CPU_SOCKET_TYPE == 0x11
//AM2 //AM2
#include "../amdmct/mct/mctardk4.c" #include "../amdmct/mct/mctardk4.c"
//#elif SYSTEM_TYPE == MOBILE //#elif SYSTEM_TYPE == MOBILE

61
src/northbridge/amd/amdmct/mct/mctardk4.c
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@ -25,7 +25,7 @@ static void Get_ChannelPS_Cfg0_D( u8 MAAdimms, u8 Speed, u8 MAAload,
void mctGet_PS_Cfg_D(struct MCTStatStruc *pMCTstat, void mctGet_PS_Cfg_D(struct MCTStatStruc *pMCTstat,
struct DCTStatStruc *pDCTstat, u32 dct) struct DCTStatStruc *pDCTstat, u32 dct)
{
print_tx("dct: ", dct); print_tx("dct: ", dct);
print_tx("Speed: ", pDCTstat->Speed); print_tx("Speed: ", pDCTstat->Speed);
@ -66,42 +66,43 @@ void mctGet_PS_Cfg_D(struct MCTStatStruc *pMCTstat,
*/ */
static const u8 Table_ATC_ODC_D_Bx[] = { static const u8 Table_ATC_ODC_D_Bx[] = {
1, 0xFF, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0 1, 0xFF, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 12, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0 2, 12, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 16, 0x00, 0x2F, 0x00, 0x0, 0x22, 0x13, 0x11, 0x0 2, 16, 0x00, 0x2F, 0x00, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 20, 0x00, 0x2F, 0x38, 0x0, 0x22, 0x13, 0x11, 0x0 2, 20, 0x00, 0x2F, 0x38, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 24, 0x00, 0x2F, 0x37, 0x0, 0x22, 0x13, 0x11, 0x0 2, 24, 0x00, 0x2F, 0x37, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 32, 0x00, 0x2F, 0x34, 0x0, 0x22, 0x13, 0x11, 0x0 2, 32, 0x00, 0x2F, 0x34, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 12, 0x20, 0x22, 0x20, 0x0, 0x22, 0x13, 0x11, 0x0 3, 12, 0x20, 0x22, 0x20, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 16, 0x20, 0x22, 0x30, 0x0, 0x22, 0x13, 0x11, 0x0 3, 16, 0x20, 0x22, 0x30, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 20, 0x20, 0x22, 0x2C, 0x0, 0x22, 0x13, 0x11, 0x0 3, 20, 0x20, 0x22, 0x2C, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 24, 0x20, 0x22, 0x2A, 0x0, 0x22, 0x13, 0x11, 0x0 3, 24, 0x20, 0x22, 0x2A, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 32, 0x20, 0x22, 0x2B, 0x0, 0x22, 0x13, 0x11, 0x0 3, 32, 0x20, 0x22, 0x2B, 0x0, 0x22, 0x13, 0x11, 0x0,
4, 0xFF, 0x20, 0x25, 0x20, 0x0, 0x22, 0x33, 0x11, 0x0 4, 0xFF, 0x20, 0x25, 0x20, 0x0, 0x22, 0x33, 0x11, 0x0,
5, 0xFF, 0x20, 0x20, 0x2F, 0x0, 0x22, 0x32, 0x11, 0x0 5, 0xFF, 0x20, 0x20, 0x2F, 0x0, 0x22, 0x32, 0x11, 0x0,
0FFh 0xFF
};
static const u8 Table_ATC_ODC_D_Ax[] = { static const u8 Table_ATC_ODC_D_Ax[] = {
1, 0xFF, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0 1, 0xFF, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 12, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0 2, 12, 0x00, 0x2F, 0x2F, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 16, 0x00, 0x2F, 0x00, 0x0, 0x22, 0x13, 0x11, 0x0 2, 16, 0x00, 0x2F, 0x00, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 20, 0x00, 0x2F, 0x38, 0x0, 0x22, 0x13, 0x11, 0x0 2, 20, 0x00, 0x2F, 0x38, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 24, 0x00, 0x2F, 0x37, 0x0, 0x22, 0x13, 0x11, 0x0 2, 24, 0x00, 0x2F, 0x37, 0x0, 0x22, 0x13, 0x11, 0x0,
2, 32, 0x00, 0x2F, 0x34, 0x0, 0x22, 0x13, 0x11, 0x0 2, 32, 0x00, 0x2F, 0x34, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 12, 0x20, 0x22, 0x20, 0x0, 0x22, 0x13, 0x11, 0x0 3, 12, 0x20, 0x22, 0x20, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 16, 0x20, 0x22, 0x30, 0x0, 0x22, 0x13, 0x11, 0x0 3, 16, 0x20, 0x22, 0x30, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 20, 0x20, 0x22, 0x2C, 0x0, 0x22, 0x13, 0x11, 0x0 3, 20, 0x20, 0x22, 0x2C, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 24, 0x20, 0x22, 0x2A, 0x0, 0x22, 0x13, 0x11, 0x0 3, 24, 0x20, 0x22, 0x2A, 0x0, 0x22, 0x13, 0x11, 0x0,
3, 32, 0x20, 0x22, 0x2B, 0x0, 0x22, 0x13, 0x11, 0x0 3, 32, 0x20, 0x22, 0x2B, 0x0, 0x22, 0x13, 0x11, 0x0,
4, 0xFF, 0x20, 0x25, 0x20, 0x0, 0x22, 0x33, 0x11, 0x0 4, 0xFF, 0x20, 0x25, 0x20, 0x0, 0x22, 0x33, 0x11, 0x0,
5, 0xFF, 0x20, 0x20, 0x2F, 0x0, 0x22, 0x32, 0x11, 0x0 5, 0xFF, 0x20, 0x20, 0x2F, 0x0, 0x22, 0x32, 0x11, 0x0,
0xFF 0xFF
}; };
static void Get_ChannelPS_Cfg0_D( u8 MAAdimms, u8 Speed, u8 MAAload, static void Get_ChannelPS_Cfg0_D( u8 MAAdimms, u8 Speed, u8 MAAload,
u8 DATAAload, u32 *AddrTmgCTL, u32 *ODC_CTL, u8 DATAAload, u32 *AddrTmgCTL, u32 *ODC_CTL,
u32 *CMDmode); u32 *CMDmode)
{ {
u8 *p; u8 *p;
@ -168,5 +169,5 @@ static void Get_ChannelPS_Cfg0_D( u8 MAAdimms, u8 Speed, u8 MAAload,
} }
p+=10; p+=10;
} while (0xFF == *p); } while (0xFF == *p);
}
} }

4
src/northbridge/amd/amdmct/wrappers/mcti_d.c
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@ -25,9 +25,9 @@ u16 mctGet_NVbits(u8 index)
switch (index) { switch (index) {
case NV_PACK_TYPE: case NV_PACK_TYPE:
#if SYSTEM_TYPE == SERVER #if CONFIG_CPU_SOCKET_TYPE == 0x10 /* Socket F */
val = 0; val = 0;
#elif SYSTEM_TYPE == DESKTOP #elif CONFIG_CPU_SOCKET_TYPE == 0x11 /* AM2r2 */
val = 1; val = 1;
//#elif SYSTEM_TYPE == MOBILE //#elif SYSTEM_TYPE == MOBILE
// val = 2; // val = 2;