From db95b24c7495fdab0613b423ad70fc4d27d29411 Mon Sep 17 00:00:00 2001 From: Yidi Lin Date: Wed, 2 Aug 2023 12:48:04 +0800 Subject: [PATCH] soc/mediatek/mt8188: Support ARM arch timer Use ARM architectual timer by initializing frequency to 13 MHz. Since system timer is the source of the architectual timer, we also call `timer_prepare` in `init_timer`. BUG=b:229800119 TEST=run `suite:faft_bios` to verify the firmware stability. check timestamps by cbmem. Cq-Depend: chromium:4747539 Change-Id: I8b1348044e4c92984510604b7f61611e13284d86 Signed-off-by: Yidi Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/76919 Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8188/Kconfig | 1 + src/soc/mediatek/mt8188/Makefile.inc | 2 +- src/soc/mediatek/mt8188/timer.c | 30 ++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+), 1 deletion(-) create mode 100644 src/soc/mediatek/mt8188/timer.c diff --git a/src/soc/mediatek/mt8188/Kconfig b/src/soc/mediatek/mt8188/Kconfig index 6d3c65998c..0568cd6f72 100644 --- a/src/soc/mediatek/mt8188/Kconfig +++ b/src/soc/mediatek/mt8188/Kconfig @@ -13,6 +13,7 @@ config SOC_MEDIATEK_MT8188 select MEDIATEK_DRAM_BLOB_FAST_INIT select USE_CBMEM_DRAM_INFO select DPM_FOUR_CHANNEL + select ARM64_USE_ARCH_TIMER if SOC_MEDIATEK_MT8188 diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc index 67c2d7ac23..1426b83356 100644 --- a/src/soc/mediatek/mt8188/Makefile.inc +++ b/src/soc/mediatek/mt8188/Makefile.inc @@ -6,7 +6,7 @@ all-y += ../common/gpio.c ../common/gpio_op.c gpio.c all-y += ../common/i2c.c i2c.c all-y += ../common/pll.c pll.c all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -all-y += ../common/timer.c ../common/timer_prepare.c +all-y += timer.c ../common/timer_prepare.c all-y += ../common/uart.c bootblock-y += bootblock.c diff --git a/src/soc/mediatek/mt8188/timer.c b/src/soc/mediatek/mt8188/timer.c new file mode 100644 index 0000000000..352fc464a8 --- /dev/null +++ b/src/soc/mediatek/mt8188/timer.c @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +static struct mtk_gpt_regs *const mtk_gpt = (void *)GPT_BASE; + +void init_timer(void) +{ + timer_prepare(); + + raw_write_cntfrq_el0(13 * MHz); + + /* TODO: remove GPT timer init after DRAM blob switching to arch timer */ + /* Disable timer and clear the counter */ + clrbits32(&mtk_gpt->gpt6_con, GPT6_CON_EN); + setbits32(&mtk_gpt->gpt6_con, GPT6_CON_CLR); + + /* Set clock source to system clock and set clock divider to 1 */ + SET32_BITFIELDS(&GPT6_CLOCK_REG(mtk_gpt), + GPT6_CLK_CLK6, GPT6_CLK_CLK6_SYS, + GPT6_CLK_CLKDIV6, GPT6_CLK_CLKDIV_DIV1); + /* Set operation mode to FREERUN mode and enable timer */ + SET32_BITFIELDS(&mtk_gpt->gpt6_con, + GPT6_CON_MODE6, GPT6_MODE_FREERUN, + GPT6_CON_EN6, GPT6_CON_EN); +}