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snow/exynos5250: move board-specific power stuff to mainboard dir 

This moves highly board-specific code out from the Exynos5250
power_init() into Snow's romstage.c. There's no reason the CPU-
specific code should care about which PMIC we are using and
which bus it is on.

Change-Id: I52313177395519cddcab11225fc23d5e50c4c4e3
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/3034
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
David Hendricks 2013-04-05 15:38:12 -07:00 committed by Ronald G. Minnich
parent 161ccc76ea
commit db9eaf4cb2
2 changed files with 50 additions and 64 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

60
src/cpu/samsung/exynos5250/power.c
View File

@ -30,10 +30,6 @@
#include <cpu/samsung/exynos5250/cpu.h>
#include <cpu/samsung/exynos5250/power.h>
#include <cpu/samsung/exynos5250/sysreg.h>
#include <drivers/maxim/max77686/max77686.h>
#include "device/i2c.h"
#include "cpu/samsung/exynos5-common/i2c.h"
static void ps_hold_setup(void)
{
@ -130,64 +126,10 @@ void power_exit_wakeup(void)
((resume_func)power->inform0)();
}
/**
* Initialize the pmic voltages to power up the system
* This also calls i2c_init so that we can program the pmic
*
* REG_ENABLE = 0, needed to set the buck/ldo enable bit ON
*
* @return Return 0 if ok, else -1
*/
int power_init(void)
{
int error = 0;
/*
* FIXME(dhendrix): We will re-factor the caller of power_init()
* to start from a board-specific romstage file and do the i2c
* early setup. There is no reason CPU power init code should
* mess with board-specific i2c parameters.
*/
/* Set the i2c register address base so i2c works before FDT */
i2c_set_early_reg(0x12c60000);
ps_hold_setup();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
/*
* We're using CR1616 coin cell battery that is non-rechargeable
* battery. But, BBCHOSTEN bit of the BBAT Charger Register in
* MAX77686 is enabled by default for charging coin cell.
*
* Also, we cannot meet the coin cell reverse current spec. in UL
* standard if BBCHOSTEN bit is enabled.
*
* Disable Coin BATT Charging
*/
error = max77686_disable_backup_batt();
error |= max77686_volsetting(PMIC_BUCK2, CONFIG_VDD_ARM_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_BUCK3, CONFIG_VDD_INT_UV,
REG_ENABLE, MAX77686_UV);
error |= max77686_volsetting(PMIC_BUCK1, CONFIG_VDD_MIF_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_BUCK4, CONFIG_VDD_G3D_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO2, CONFIG_VDD_LDO2_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO3, CONFIG_VDD_LDO3_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO5, CONFIG_VDD_LDO5_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO10, CONFIG_VDD_LDO10_MV,
REG_ENABLE, MAX77686_MV);
if (error != 0) {
power_shutdown();
printk(BIOS_ERR, "power init failed\n");
}
return error;
return 0;
}
void power_enable_xclkout(void)

54
src/mainboard/google/snow/romstage.c
View File

@ -35,6 +35,9 @@
#include <console/console.h>
#include <arch/stages.h>
#include <drivers/maxim/max77686/max77686.h>
#include <device/i2c.h>
#include "mainboard.h"
#define MMC0_GPIO_PIN (58)
@ -52,6 +55,45 @@ static int board_wakeup_permitted(void)
}
#endif
static int setup_pmic(void)
{
int error = 0;
/*
* We're using CR1616 coin cell battery that is non-rechargeable
* battery. But, BBCHOSTEN bit of the BBAT Charger Register in
* MAX77686 is enabled by default for charging coin cell.
*
* Also, we cannot meet the coin cell reverse current spec. in UL
* standard if BBCHOSTEN bit is enabled.
*
* Disable Coin BATT Charging
*/
error = max77686_disable_backup_batt();
error |= max77686_volsetting(PMIC_BUCK2, CONFIG_VDD_ARM_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_BUCK3, CONFIG_VDD_INT_UV,
REG_ENABLE, MAX77686_UV);
error |= max77686_volsetting(PMIC_BUCK1, CONFIG_VDD_MIF_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_BUCK4, CONFIG_VDD_G3D_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO2, CONFIG_VDD_LDO2_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO3, CONFIG_VDD_LDO3_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO5, CONFIG_VDD_LDO5_MV,
REG_ENABLE, MAX77686_MV);
error |= max77686_volsetting(PMIC_LDO10, CONFIG_VDD_LDO10_MV,
REG_ENABLE, MAX77686_MV);
if (error)
printk(BIOS_CRIT, "%s: Error during PMIC setup\n", __func__);
return error;
}
static void initialize_s5p_mshc(void)
{
/* MMC0: Fixed, 8 bit mode, connected with GPIO. */
@ -90,11 +132,13 @@ void main(void)
system_clock_init(mem, arm_ratios);
console_init();
/*
* FIXME: Do necessary I2C init so low-level PMIC code doesn't need to.
* Also, we should only call power_init() on cold boot.
*/
power_init();
i2c_set_early_reg(0x12c60000);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
if (power_init())
power_shutdown();
if (setup_pmic())
power_shutdown();
if (!mem) {
printk(BIOS_CRIT, "Unable to auto-detect memory timings\n");