diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
index 7d033677aa..0c4780b89c 100644
--- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
+++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
@@ -61,6 +61,8 @@ void lpc_set_bios_interface_lock_down(void);
 void lpc_set_lock_enable(void);
 /* Set LPC BIOS Control EISS bit. */
 void lpc_set_eiss(void);
+/* Set LPC BIOS Decode LE bit */
+void lpc_set_bde(void);
 /* Set LPC Serial IRQ mode. */
 void lpc_set_serirq_mode(enum serirq_mode mode);
 /* Enable CLKRUN_EN for power gating LPC. */
diff --git a/src/soc/intel/common/block/lpc/lpc_def.h b/src/soc/intel/common/block/lpc/lpc_def.h
index b73cc567a8..385f307a69 100644
--- a/src/soc/intel/common/block/lpc/lpc_def.h
+++ b/src/soc/intel/common/block/lpc/lpc_def.h
@@ -27,6 +27,8 @@
 #define  LPC_LGMR_ADDR_MASK		0xffff0000
 #define  LPC_LGMR_EN			(1 << 0)
 #define LPC_LGMR_WINDOW_SIZE		(64 * KiB)
+#define LPC_BIOS_DECODE_EN		0xd8
+#define  LPC_BIOS_DECODE_LOCK		(1 << 31)
 #define LPC_BIOS_CNTL			0xdc
 #define  LPC_BC_BILD			(1 << 7) /* BILD */
 #define  LPC_BC_LE			(1 << 1) /* LE */
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index c820203d6d..ed76049b6d 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -298,6 +298,16 @@ void lpc_disable_wp(void)
 	lpc_configure_write_protect(false);
 }
 
+void lpc_set_bde(void)
+{
+	const pci_devfn_t dev = PCH_DEV_LPC;
+	uint32_t bde;
+
+	bde = pci_read_config32(dev, LPC_BIOS_DECODE_EN);
+	bde |= LPC_BIOS_DECODE_LOCK;
+	pci_write_config32(dev, LPC_BIOS_DECODE_EN, bde);
+}
+
 /*
 * Set LPC Serial IRQ mode.
 */