soc/intel/denverton: Move PCI IDs to pci_ids.h

This patch moves the PCI ID definitions to pci_ids.h file
and replaces every occurrence with the new names.

The resulting binary doesn't differ from the one
without this patch.

Used documents:
- Intel 337018

Change-Id: Ib7d2aae78c8877f3c9287d03b20a5620db293445
Signed-off-by: Felix Singer <felix.singer@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>

src/include/device/pci_ids.h

@@ -2680,6 +2680,40 @@
 #define PCI_DEVICE_ID_INTEL_PCIE_PB	0x3597
 #define PCI_DEVICE_ID_INTEL_PCIE_PC	0x3599
 
+/* Intel Denverton (Atom C3000 family) */
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SA		0x1980
+#define PCI_DEVICE_ID_INTEL_DENVERTONAD_SA		0x1995
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP0		0x19a4
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP1		0x19a5
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP2		0x19a6
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP3		0x19a7
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP4		0x19a8
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP5		0x19a9
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP6		0x19aa
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PCIE_RP7		0x19ab
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SMBUS		0x19ac
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_1	0x19b2
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_2	0x19c2
+#define PCI_DEVICE_ID_INTEL_DENVERTON_XHCI		0x19d0
+#define PCI_DEVICE_ID_INTEL_DENVERTON_LAN_1		0x19d1
+#define PCI_DEVICE_ID_INTEL_DENVERTON_LAN_2		0x19d2
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_HECI_1		0x19d3
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_HECI_2		0x19d4
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_KT		0x19d5
+#define PCI_DEVICE_ID_INTEL_DENVERTON_ME_HECI_3		0x19d6
+#define PCI_DEVICE_ID_INTEL_DENVERTON_HSUART		0x19d8
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_HECI_1		0x19e5
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_HECI_2		0x19e6
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_KT		0x19e8
+#define PCI_DEVICE_ID_INTEL_DENVERTON_IE_HECI_3		0x19e9
+#define PCI_DEVICE_ID_INTEL_DENVERTON_EMMC		0x19db
+#define PCI_DEVICE_ID_INTEL_DENVERTON_LPC		0x19dc
+#define PCI_DEVICE_ID_INTEL_DENVERTON_P2SB		0x19dd
+#define PCI_DEVICE_ID_INTEL_DENVERTON_PMC		0x19de
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SMBUS_LEGACY	0x19df
+#define PCI_DEVICE_ID_INTEL_DENVERTON_SPI		0x19e0
+#define PCI_DEVICE_ID_INTEL_DENVERTON_TRACEHUB		0x19e1
+
 /* Intel LPC device ids  */
 #define PCI_DEVICE_ID_INTEL_LPT_MOBILE_SAMPLE		0x8c41
 #define PCI_DEVICE_ID_INTEL_LPT_DESKTOP_SAMPLE		0x8c42

src/soc/intel/denverton_ns/csme_ie_kt.c

@@ -76,8 +76,8 @@ static struct device_operations csme_ie_kt_ops = {
 };
 
 static const unsigned short pci_device_ids[] = {
-	ME_MEKT_DEVID, /* DVN CSME KT */
+	PCI_DEVICE_ID_INTEL_DENVERTON_ME_KT,
-	IE_MEKT_DEVID, /* DVN IE KT */
+	PCI_DEVICE_ID_INTEL_DENVERTON_IE_KT,
 	0
 };
 

src/soc/intel/denverton_ns/include/soc/pci_devs.h

@@ -158,46 +158,4 @@
 #define PCH_DEV_LPC _PCH_DEV(LPC, 0)
 #define PCH_DEV_SPI _PCH_DEV(LPC, 5)
 
-#define SA_DEVID 0x1980
-#define SA_DEVID_DNVAD 0x1995
-#define SOC_DEVID SA_DEVID
-#define RAS_DEVID 0x19a1
-#define RCEC_DEVID 0x19a2
-#define VRP2_DEVID 0x19a3
-#define PCIE_PORT1_DEVID 0x19a4
-#define PCIE_PORT2_DEVID 0x19a5
-#define PCIE_PORT3_DEVID 0x19a6
-#define PCIE_PORT4_DEVID 0x19a7
-#define PCIE_PORT5_DEVID 0x19a8
-#define PCIE_PORT6_DEVID 0x19a9
-#define PCIE_PORT7_DEVID 0x19aa
-#define PCIE_PORT8_DEVID 0x19ab
-#define SMBUS2_DEVID 0x19ac
-#define AHCI_DEVID 0x19b2
-#define AHCI2_DEVID 0x19c2
-#define XHCI_DEVID 0x19d0
-#define VRP0_DEVID 0x19d1
-#define VRP1_DEVID 0x19d2
-#define ME_HECI1_DEVID 0x19d3
-#define ME_HECI2_DEVID 0x19d4
-#define ME_IEDR_DEVID 0x19ea
-#define ME_MEKT_DEVID 0x19d5
-#define ME_HECI3_DEVID 0x19d6
-#define HSUART_DEVID 0x19d8
-#define HSUART1_DEVID HSUART_DEVID
-#define HSUART2_DEVID HSUART_DEVID
-#define HSUART3_DEVID HSUART_DEVID
-#define IE_HECI1_DEVID 0x19e5
-#define IE_HECI2_DEVID 0x19e6
-#define IE_IEDR_DEVID 0x19e7
-#define IE_MEKT_DEVID 0x19e8
-#define IE_HECI3_DEVID 0x19e9
-#define MMC_DEVID 0x19db
-#define LPC_DEVID 0x19dc
-#define P2SB_DEVID 0x19dd
-#define PMC_DEVID 0x19de
-#define SMBUS_DEVID 0x19df
-#define SPI_DEVID 0x19e0
-#define NPK_DEVID 0x19e1
-
 #endif /* _DENVERTON_NS_PCI_DEVS_H_ */

src/soc/intel/denverton_ns/lpc.c

@@ -324,7 +324,7 @@ static struct device_operations device_ops = {
 static const struct pci_driver lpc_driver __pci_driver = {
 	.ops = &device_ops,
 	.vendor = PCI_VENDOR_ID_INTEL,
-	.device = LPC_DEVID,
+	.device = PCI_DEVICE_ID_INTEL_DENVERTON_LPC,
 };
 
 static void finalize_chipset(void *unused)

src/soc/intel/denverton_ns/npk.c

@@ -46,5 +46,5 @@ static struct device_operations pmc_ops = {
 static const struct pci_driver pch_pmc __pci_driver = {
 	.ops = &pmc_ops,
 	.vendor = PCI_VENDOR_ID_INTEL,
-	.device = NPK_DEVID,
+	.device = PCI_DEVICE_ID_INTEL_DENVERTON_TRACEHUB,
 };

src/soc/intel/denverton_ns/pmc.c

@@ -113,5 +113,5 @@ static struct device_operations pmc_ops = {
 static const struct pci_driver pch_pmc __pci_driver = {
 	.ops = &pmc_ops,
 	.vendor = PCI_VENDOR_ID_INTEL,
-	.device = PMC_DEVID,
+	.device = PCI_DEVICE_ID_INTEL_DENVERTON_PMC,
 };

src/soc/intel/denverton_ns/sata.c

@@ -74,8 +74,8 @@ static struct device_operations sata_ops = {
 };
 
 static const unsigned short pci_device_ids[] = {
-	AHCI_DEVID,  /* DVN SATA AHCI */
+	PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_1,
-	AHCI2_DEVID, /* DVN SATA2 AHCI */
+	PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_2,
 	0
 };
 

src/soc/intel/denverton_ns/systemagent.c

@@ -344,8 +344,8 @@ static struct device_operations systemagent_ops = {
 
 /* IDs for System Agent device of Intel Denverton SoC */
 static const unsigned short systemagent_ids[] = {
-	SA_DEVID, /* DVN System Agent */
+	PCI_DEVICE_ID_INTEL_DENVERTON_SA,
-	SA_DEVID_DNVAD, /* DVN-AD System Agent */
+	PCI_DEVICE_ID_INTEL_DENVERTONAD_SA,
 	0
 };
 

src/soc/intel/denverton_ns/uart.c

@@ -58,7 +58,7 @@ static struct device_operations uart_ops = {
 };
 
 static const unsigned short uart_ids[] = {
-	HSUART_DEVID, /* HSUART 0/1/2 */
+	PCI_DEVICE_ID_INTEL_DENVERTON_HSUART,
 	0
 };
 

src/soc/intel/denverton_ns/xhci.c

@@ -47,5 +47,5 @@ static struct device_operations usb_xhci_ops = {
 static const struct pci_driver pch_usb_xhci __pci_driver = {
 	.ops = &usb_xhci_ops,
 	.vendor = PCI_VENDOR_ID_INTEL,
-	.device = XHCI_DEVID,
+	.device = PCI_DEVICE_ID_INTEL_DENVERTON_XHCI,
 };