drivers/intel/fsp2_0: Allow SoC/mainboard to update NvsBufferPtr
This change moves the check for NvsBufferPtr in S3 resume case to happen just before FSP-M is called. This allows SoC/mainboard code to set NvsBufferPtr if it doesn't use the default MRC cache driver. BUG=b:155990176 Change-Id: Ia272573ad7117a0cb851f0bfe6a4c7989bc64cde Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42109 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -196,15 +196,6 @@ static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd,
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/* Configure bootmode */
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/* Configure bootmode */
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if (s3wake) {
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if (s3wake) {
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/*
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* For S3 resume case, if valid mrc cache data is not found or
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* RECOVERY_MRC_CACHE hash verification fails, the S3 data
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* pointer would be null and S3 resume fails with fsp-m
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* returning error. Invoking a reset here saves time.
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*/
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if (!arch_upd->NvsBufferPtr)
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/* FIXME: A "system" reset is likely enough: */
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full_reset();
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arch_upd->BootMode = FSP_BOOT_ON_S3_RESUME;
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arch_upd->BootMode = FSP_BOOT_ON_S3_RESUME;
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} else {
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} else {
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if (arch_upd->NvsBufferPtr)
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if (arch_upd->NvsBufferPtr)
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@ -296,6 +287,16 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake)
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/* Give SoC and mainboard a chance to update the UPD */
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/* Give SoC and mainboard a chance to update the UPD */
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platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version);
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platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version);
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/*
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* For S3 resume case, if valid mrc cache data is not found or
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* RECOVERY_MRC_CACHE hash verification fails, the S3 data
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* pointer would be null and S3 resume fails with fsp-m
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* returning error. Invoking a reset here saves time.
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*/
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if (s3wake && !arch_upd->NvsBufferPtr)
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/* FIXME: A "system" reset is likely enough: */
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full_reset();
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if (CONFIG(MMA))
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if (CONFIG(MMA))
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setup_mma(&fspm_upd.FspmConfig);
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setup_mma(&fspm_upd.FspmConfig);
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