mb/intel/tglrvp: Enable recovery in TGL RVP
Share "EC in RW" GPIO with depthcharge. Also we define the CONFIGS needed CHROME, CHROME_EC and use the chrome lid and recovery. BUG=None BRANCH=None TEST=Build and boot TGL RVP. Check recovery works with crossystem recovery_request. Change-Id: I1e88200e3f8418e5b0ab39ac65ed1b3545ce111e Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
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@ -16,10 +16,15 @@ config BOARD_SPECIFIC_OPTIONS
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select SOC_INTEL_TIGERLAKE
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select INTEL_LPSS_UART_FOR_CONSOLE
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select DRIVERS_INTEL_ISH
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select EC_ACPI
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config CHROMEOS
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bool
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default y
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select EC_GOOGLE_CHROMEEC_SWITCHES if TGL_CHROME_EC
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select GBB_FLAG_FORCE_MANUAL_RECOVERY
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select HAS_RECOVERY_MRC_CACHE
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select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
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select GBB_FLAG_FORCE_DEV_SWITCH_ON
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select GBB_FLAG_FORCE_DEV_BOOT_USB
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@ -68,9 +73,9 @@ choice TGL_EC
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config TGL_CHROME_EC
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bool "Chrome EC"
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_LPC
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select EC_GOOGLE_CHROMEEC_ESPI
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select EC_GOOGLE_CHROMEEC_BOARDID
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select EC_ACPI
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config TGL_INTEL_EC
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bool "Intel EC"
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@ -81,8 +86,6 @@ endchoice
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config VBOOT
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select VBOOT_LID_SWITCH
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select VBOOT_MOCK_SECDATA
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select HAS_RECOVERY_MRC_CACHE
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select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
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config UART_FOR_CONSOLE
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int
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@ -12,10 +12,12 @@ void fill_lb_gpios(struct lb_gpios *gpios)
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{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
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{-1, ACTIVE_HIGH, 0, "power"},
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{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
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{-1, ACTIVE_HIGH, 0, "EC in RW"},
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};
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lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
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}
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#if !CONFIG(EC_GOOGLE_CHROMEEC_SWITCHES)
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int get_lid_switch(void)
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{
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/* Lid always open */
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@ -27,6 +29,8 @@ int get_recovery_mode_switch(void)
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return 0;
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}
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#endif /*!CONFIG(EC_GOOGLE_CHROMEEC_SWITCHES) */
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int get_write_protect_state(void)
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{
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/* No write protect */
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