nb/intel/sandybridge: Use an enum for `gpu_panel_port_select`

All boards currently have backlight on either LVDS or eDP.

Change-Id: I878bc7f1ff75a2b82b9556e855aff1d4d03e0268
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45035
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-09-02 19:17:30 +02:00 committed by Patrick Georgi
parent d04957970c
commit dc0c081001
25 changed files with 31 additions and 25 deletions

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "1"
register "gpu_panel_port_select" = "PANEL_PORT_DP_A"
register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "10"
register "gpu_panel_power_cycle_delay" = "6"

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_backlight_off_delay" = "0"
register "gpu_panel_power_backlight_on_delay" = "0"
register "gpu_panel_power_cycle_delay" = "4"

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@ -7,7 +7,7 @@ chip northbridge/intel/sandybridge
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as eDP and configure power delays
register "gpu_panel_port_select" = "1" # eDP_A
register "gpu_panel_port_select" = "PANEL_PORT_DP_A"
register "gpu_panel_power_cycle_delay" = "6" # 500ms
register "gpu_panel_power_up_delay" = "2000" # 200ms
register "gpu_panel_power_down_delay" = "500" # 50ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "5" # 400ms
register "gpu_panel_power_up_delay" = "500" # 50ms
register "gpu_panel_power_down_delay" = "150" # 15ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "5" # T4: 400ms
register "gpu_panel_power_up_delay" = "400" # T1+T2: 40ms
register "gpu_panel_power_down_delay" = "150" # T3: 15ms

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@ -8,7 +8,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "2000"
register "gpu_panel_power_cycle_delay" = "5"

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@ -4,7 +4,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "0"
register "gpu_dp_c_hotplug" = "0"
register "gpu_dp_d_hotplug" = "0"
register "gpu_panel_port_select" = "0"
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_backlight_off_delay" = "0"
register "gpu_panel_power_backlight_on_delay" = "0"
register "gpu_panel_power_cycle_delay" = "0"

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@ -4,7 +4,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "2000"
register "gpu_panel_power_cycle_delay" = "5"

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "1"
register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "1"
register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms

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@ -5,7 +5,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms

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@ -5,7 +5,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms

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@ -5,7 +5,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "4"
# Enable Panel as eDP and configure power delays
register "gpu_panel_port_select" = "1" # eDP
register "gpu_panel_port_select" = "PANEL_PORT_DP_A"
register "gpu_panel_power_up_delay" = "2000" # 200ms
register "gpu_panel_power_down_delay" = "500" # 50ms
register "gpu_panel_power_backlight_on_delay" = "1" # 0.1ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "5"
register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms

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@ -5,7 +5,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x04"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0"
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "4"
register "gpu_panel_power_up_delay" = "100"
register "gpu_panel_power_down_delay" = "100"

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@ -4,7 +4,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "3000"
register "gpu_panel_power_cycle_delay" = "6"

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "5"
register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms

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@ -5,7 +5,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "4"
# Enable Panel as eDP and configure power delays
register "gpu_panel_port_select" = "1" # eDP
register "gpu_panel_port_select" = "PANEL_PORT_DP_A"
register "gpu_panel_power_backlight_off_delay" = "1" # 0.1ms
register "gpu_panel_power_backlight_on_delay" = "1" # 0.1ms
register "gpu_panel_power_down_delay" = "500" # 50ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000400, 0x80000300, 0x80000100, }"
# Enable Panel as eDP and configure power delays
register "gpu_panel_port_select" = "1" # eDP_A
register "gpu_panel_port_select" = "PANEL_PORT_DP_A"
register "gpu_panel_power_cycle_delay" = "6" # 500ms
register "gpu_panel_power_up_delay" = "2000" # 200ms
register "gpu_panel_power_down_delay" = "500" # 50ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000400, 0x80000300, 0x80000301, 0x80000100, }"
# Enable Panel as eDP and configure power delays
register "gpu_panel_port_select" = "1" # eDP_A
register "gpu_panel_port_select" = "PANEL_PORT_DP_A"
register "gpu_panel_power_cycle_delay" = "6" # 500ms
register "gpu_panel_power_up_delay" = "2000" # 200ms
register "gpu_panel_power_down_delay" = "500" # 50ms

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@ -6,7 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
register "gpu_panel_port_select" = "0" # LVDS
register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "5" # T4: 400ms
register "gpu_panel_power_up_delay" = "400" # T1+T2: 40ms
register "gpu_panel_power_down_delay" = "150" # T3: 15ms

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@ -19,7 +19,13 @@ struct northbridge_intel_sandybridge_config {
u8 gpu_dp_c_hotplug; /* Digital Port C Hotplug Config */
u8 gpu_dp_d_hotplug; /* Digital Port D Hotplug Config */
u8 gpu_panel_port_select; /* 0=LVDS 1=DP_B 2=DP_C 3=DP_D */
enum {
PANEL_PORT_LVDS = 0,
PANEL_PORT_DP_A = 1, /* Also known as eDP */
PANEL_PORT_DP_C = 2,
PANEL_PORT_DP_D = 3,
} gpu_panel_port_select;
u8 gpu_panel_power_cycle_delay; /* T4 time sequence */
u16 gpu_panel_power_up_delay; /* T1+T2 time sequence */
u16 gpu_panel_power_down_delay; /* T3 time sequence */