From dc2285bc052e38f0dd3ae43e2aad8cd602837fb4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 14 Apr 2023 10:17:54 +0300 Subject: [PATCH] sb/intel: Use ACPI_FADT_C2/C3_NOT_SUPPORTED defines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I242e05ee63f46bedbab3a425e922e60f1c749a15 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/74409 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held Reviewed-by: Paul Menzel Reviewed-by: Arthur Heymans --- src/southbridge/intel/bd82x6x/fadt.c | 4 ++-- src/southbridge/intel/i82371eb/fadt.c | 4 ++-- src/southbridge/intel/ibexpeak/fadt.c | 4 ++-- src/southbridge/intel/lynxpoint/fadt.c | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c index f62519840d..be315af8e1 100644 --- a/src/southbridge/intel/bd82x6x/fadt.c +++ b/src/southbridge/intel/bd82x6x/fadt.c @@ -32,8 +32,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 16; /* P_LVLx not used */ - fadt->p_lvl2_lat = 101; - fadt->p_lvl3_lat = 1001; + fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; + fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; /* P_CNT not supported */ fadt->duty_offset = 0; fadt->duty_width = 0; diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 1d640f4e41..fc3258ae9b 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -36,8 +36,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 4; - fadt->p_lvl2_lat = 101; /* >100 means c2 not supported */ - fadt->p_lvl3_lat = 1001; /* >1000 means c3 not supported */ + fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; + fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* bit 1:3 in PCNTRL reg (pmbase+0x10) */ fadt->duty_width = 3; /* this width is in bits */ fadt->day_alrm = 0x0d; /* rtc CMOS RAM offset */ diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c index 13243afc77..9921b4d587 100644 --- a/src/southbridge/intel/ibexpeak/fadt.c +++ b/src/southbridge/intel/ibexpeak/fadt.c @@ -32,8 +32,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 16; /* P_LVLx not used */ - fadt->p_lvl2_lat = 101; - fadt->p_lvl3_lat = 1001; + fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; + fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; /* P_CNT not supported */ fadt->duty_offset = 0; fadt->duty_width = 0; diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c index 2051223b8f..fc08f01087 100644 --- a/src/southbridge/intel/lynxpoint/fadt.c +++ b/src/southbridge/intel/lynxpoint/fadt.c @@ -45,8 +45,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 2 * 8; /* P_LVLx not used */ - fadt->p_lvl2_lat = 101; - fadt->p_lvl3_lat = 1001; + fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; + fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 0; fadt->duty_width = 0; fadt->day_alrm = 0xd;