Clean up vt1211 SuperIO support and make the EPIA-M config use it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jonathan McDowell
parent
1950783e00
commit
dc2454eb94
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@ -145,6 +145,30 @@ chip northbridge/via/vt8623
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device pci 10.3 on end # USB 2
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device pci 11.0 on # Southbridge
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chip superio/via/vt1211
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device pnp 2e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 off # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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drq 0x74 = 3
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end
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device pnp 2e.2 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.b on # HWM
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io 0x60 = 0xec00
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end
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end
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end
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device pci 11.1 on end # IDE
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@ -153,12 +177,6 @@ chip northbridge/via/vt8623
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device pci 11.6 off end # AC97 Modem
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device pci 12.0 on end # Ethernet
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end
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chip superio/via/vt1211
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register "enable_com_ports" = "1"
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register "enable_hwmon" = "1"
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register "enable_lpt" = "1"
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register "enable_fdc" = "1"
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end
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# This is on the EPIA MII, not the M.
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# chip southbridge/ricoh/rl5c476
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# end
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@ -1,19 +1,12 @@
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#ifndef _SUPERIO_VIA_VT1211
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#define _SUPERIO_VIA_VT1211
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extern struct chip_operations superio_via_vt1211_control;
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#include <uart8250.h>
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extern struct chip_operations superio_via_vt1211_ops;
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struct superio_via_vt1211_config {
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/* PCI function enables */
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/* i.e. so that pci scan bus will find them. */
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/* I am putting in IDE as an example but obviously this needs
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* to be more complete!
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*/
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/* enables of functions of devices */
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int enable_com_ports;
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int enable_fdc;
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int enable_lpt;
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int enable_hwmon;
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struct uart8250 com1, com2;
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};
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#endif /* _SUPERIO_VIA_VT1211 */
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@ -22,11 +22,11 @@
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <device/pci_ids.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <uart8250.h>
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#include "vt1211.h"
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#include "chip.h"
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@ -47,102 +47,120 @@ static unsigned char vt1211hwmonitorinits[]={
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0x4c,0x0, 0x4d,0x0, 0x4e,0xf, 0x5d,0x77,
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0x5c,0x0, 0x5f,0x33, 0x40,0x1};
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static void start_conf_pnp(int dev)
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static void pnp_enter_ext_func_mode(device_t dev)
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{
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outb(0x87,0x2e);
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outb(0x87,0x2e);
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outb(7,0x2e);
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outb(dev,0x2f);
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}
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static void write_pnp(int reg, int val)
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{
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outb(reg,0x2e);
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outb(val,0x2f);
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}
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static void end_conf_pnp()
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{
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outb(0xaa,0x2e);
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outb(0x87, dev->path.u.pnp.port);
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outb(0x87, dev->path.u.pnp.port);
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}
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static void vt1211_init(struct superio_via_vt1211_config *conf)
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static void pnp_exit_ext_func_mode(device_t dev)
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{
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outb(0xaa, dev->path.u.pnp.port);
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}
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static void init_hwm(unsigned long base)
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{
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int i;
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// Activate the vt1211 hardware monitor
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if(conf->enable_hwmon){
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start_conf_pnp(0x0b);
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write_pnp(0x60,0xec);
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write_pnp(0x30,1);
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end_conf_pnp();
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// initialize vt1211 hardware monitor registers, which are at 0xECXX
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for(i=0;i<sizeof(vt1211hwmonitorinits);i+=2)
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outb(vt1211hwmonitorinits[i+1],0xec00+vt1211hwmonitorinits[i]);
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// initialize vt1211 hardware monitor registers, which are at 0xECXX
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for(i = 0; i < sizeof(vt1211hwmonitorinits); i += 2) {
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outb(vt1211hwmonitorinits[i + 1],
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base + vt1211hwmonitorinits[i]);
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}
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if( conf->enable_fdc){
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// activate FDC
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start_conf_pnp(0); // fdc is device 0
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write_pnp(0x60,0xfc); // io address
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write_pnp(0x70,0x06); // interupt
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write_pnp(0x74,0x02); // dma
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write_pnp(0x30,0x01); // activate it
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end_conf_pnp();
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}
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if( conf->enable_com_ports ){
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// activate com2
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start_conf_pnp(3);
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write_pnp(0x60,0xbe);
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write_pnp(0x70,0x3);
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write_pnp(0xf0,0x02);
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write_pnp(0x30,0x01);
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end_conf_pnp();
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}
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if( conf->enable_lpt ){
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// activate lpt
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start_conf_pnp(1);
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write_pnp(0x60,0xde);
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write_pnp(0x70,0x07);
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write_pnp(0x74,0x3);
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write_pnp(0x30,0x01);
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end_conf_pnp();
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}
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}
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static void superio_init(struct chip *chip, enum chip_pass pass)
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static void vt1211_init(struct device *dev)
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{
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struct superio_via_vt1211_config *conf = dev->chip_info;
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struct resource *res0;
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struct superio_via_vt1211_config *conf =
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(struct superio_via_vt1211_config *)chip->chip_info;
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if (!dev->enabled) {
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return;
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}
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switch (pass) {
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case CONF_PASS_PRE_PCI:
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switch (dev->path.u.pnp.device) {
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case VT1211_SP1:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_uart8250(res0->base, &conf->com1);
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break;
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case CONF_PASS_POST_PCI:
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vt1211_init(conf);
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case VT1211_SP2:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_uart8250(res0->base, &conf->com2);
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break;
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case CONF_PASS_PRE_BOOT:
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case VT1211_HWM:
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res0 = find_resource(dev, PNP_IDX_IO0);
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init_hwm(res0->base);
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break;
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default:
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/* nothing yet */
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break;
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printk_info("vt1211 asked to initialise unknown device!\n");
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}
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/* activate com2
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start_conf_pnp(3);
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write_pnp(0x60,0xbe);
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write_pnp(0x70,0x3);
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write_pnp(0xf0,0x02);
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write_pnp(0x30,0x01);
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end_conf_pnp();
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// Activate the vt1211 hardware monitor
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start_conf_pnp(0x0b);
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write_pnp(0x60,0xec);
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write_pnp(0x30,1);
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end_conf_pnp(); */
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}
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void vt1211_pnp_enable_resources(device_t dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_enable_resources(dev);
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pnp_exit_ext_func_mode(dev);
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}
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void vt1211_pnp_set_resources(struct device *dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_resources(dev);
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pnp_exit_ext_func_mode(dev);
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}
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void vt1211_pnp_enable(device_t dev)
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{
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if (!dev->enabled) {
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_exit_ext_func_mode(dev);
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}
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}
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static void enumerate(struct chip *chip)
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struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = vt1211_pnp_set_resources,
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.enable_resources = vt1211_pnp_enable_resources,
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.enable = vt1211_pnp_enable,
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.init = vt1211_init,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, VT1211_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, VT1211_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, VT1211_SP1, PNP_IO0 | PNP_IRQ0, { 0x07f8, 0}, },
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{ &ops, VT1211_SP2, PNP_IO0 | PNP_IRQ0, { 0x07f8, 0}, },
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{ &ops, VT1211_HWM, PNP_IO0 , { 0xfff8, 0 }, },
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};
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static void enable_dev(struct device *dev)
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{
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extern struct device_operations default_pci_ops_bus;
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chip_enumerate(chip);
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chip->dev->ops = &default_pci_ops_bus;
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printk_debug("vt1211 enabling PNP devices.\n");
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pnp_enable_devices(dev,
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&ops,
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sizeof(pnp_dev_info) / sizeof(pnp_dev_info[0]),
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pnp_dev_info);
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}
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struct chip_operations superio_via_vt1211_control = {
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struct chip_operations superio_via_vt1211_ops = {
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CHIP_NAME("VIA vt1211")
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.enumerate = enumerate,
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.enable = superio_init,
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.enable_dev = enable_dev,
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};
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@ -18,5 +18,17 @@
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* MA 02111-1307 USA
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*/
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/* vt1211 routines and defines*/
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/* vt1211 PNP devices */
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#define VT1211_FDC 0 /* Floppy */
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#define VT1211_PP 1 /* Parallel Port */
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#define VT1211_SP1 2 /* COM1 */
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#define VT1211_SP2 3 /* COM2 */
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#define VT1211_MIDI 6 /* MIDI */
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#define VT1211_GAME 7 /* Game port */
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#define VT1211_GPIO 8 /* GPIO pins */
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#define VT1211_WATCHDOG 9 /* Watchdog timer */
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#define VT1211_WAKEUP 10 /* Wakeup control */
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#define VT1211_HWM 11 /* Hardware monitor */
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#define VT1211_FIR 12 /* Irda */
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#define VT1211_ROM 13 /* ROM control */
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