baytrail: add vboot ramstage verification
Add suport for verifying the ramstage with vboot during romstage execution. Along with this support select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM to cache the relocated ramstage 1MiB below the top end of the TSEG region. BUG=chrome-os-partner:23249 BRANCH=None TEST=Built and booted with CONFIG_VBOOT_VERIFY_FIRMWARE=y selected. Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I355f62469bdcca62b0a4468100effab0342dc8fc Reviewed-on: https://chromium-review.googlesource.com/172712 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4880 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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@ -25,12 +25,15 @@
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#include <console/console.h>
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#include <cbmem.h>
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#include <cpu/x86/mtrr.h>
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#include <ramstage_cache.h>
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#include <romstage_handoff.h>
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#include <timestamp.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <baytrail/gpio.h>
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#include <baytrail/iomap.h>
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#include <baytrail/lpc.h>
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#include <baytrail/pci_devs.h>
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#include <baytrail/reset.h>
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#include <baytrail/romstage.h>
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static inline uint64_t timestamp_get(void)
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@ -169,6 +172,9 @@ void asmlinkage romstage_after_car(void)
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timestamp_add_now(TS_END_ROMSTAGE);
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/* Run vboot verification if configured. */
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vboot_verify_firmware(romstage_handoff_find_or_add());
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/* Load the ramstage. */
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copy_and_run();
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while (1);
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@ -270,3 +276,25 @@ static void *setup_stack_and_mttrs(void)
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return slot;
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}
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struct ramstage_cache *ramstage_cache_location(long *size)
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{
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char *smm_base;
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/* 1MiB cache size */
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const long cache_size = (1 << 20);
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/* Ramstage cache lives in TSEG region which is the definition of
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* cbmem_top(). */
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smm_base = cbmem_top();
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*size = cache_size;
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return (void *)&smm_base[CONFIG_SMM_TSEG_SIZE - cache_size];
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}
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void ramstage_cache_invalid(struct ramstage_cache *cache)
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{
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#if CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE
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/* Perform cold reset on invalid ramstage cache. */
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cold_reset();
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#endif
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}
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