soc/intel/common: Add IGD OpRegion support
Add helper function that fills OpRegion structure based on VBT file content and some reasonable defaults. Change-Id: I9aa8862878cc016a9a684c844ceab390734f3e84 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/14806 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -72,4 +72,8 @@ config VBT_FILE
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help
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The path and filename of the VBT binary.
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config SOC_INTEL_COMMON_GFX_OPREGION
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bool
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default n
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endif # SOC_INTEL_COMMON
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@ -15,6 +15,7 @@ ramstage-y += util.c
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ramstage-$(CONFIG_MMA) += mma.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
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ramstage-y += vbt.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_GFX_OPREGION) += opregion.c
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# Create and add the MRC cache to the cbfs image
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ifneq ($(CONFIG_CHROMEOS),y)
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@ -0,0 +1,177 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Intel Corp.
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* (Written by Abhay Kumar <abhay.kumar@intel.com> for Intel Corp.)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _COMMON_GMA_H_
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#define _COMMON_GMA_H_
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#include <types.h>
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/* IGD PCI Configuration register */
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#define ASLS 0xfc /* OpRegion Base */
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#define SWSCI 0xe8 /* SWSCI Register */
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#define GSSCIE (1 << 0) /* SCI Event trigger */
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#define SMISCISEL (1 << 15) /* Select SMI or SCI event source */
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/* mailbox 0: header */
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typedef struct {
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u8 signature[16];
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u32 size;
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u32 version;
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u8 sbios_version[32];
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u8 vbios_version[16];
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u8 driver_version[16];
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u32 mailboxes;
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u8 reserved[164];
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} __attribute__((packed)) opregion_header_t;
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#define IGD_OPREGION_SIGNATURE "IntelGraphicsMem"
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#define IGD_OPREGION_VERSION 2
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#define IGD_MBOX1 (1 << 0)
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#define IGD_MBOX2 (1 << 1)
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#define IGD_MBOX3 (1 << 2)
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#define IGD_MBOX4 (1 << 3)
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#define IGD_MBOX5 (1 << 4)
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#define MAILBOXES_MOBILE (IGD_MBOX1 | IGD_MBOX2 | IGD_MBOX3 | \
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IGD_MBOX4 | IGD_MBOX5)
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#define MAILBOXES_DESKTOP (IGD_MBOX2 | IGD_MBOX4)
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#define SBIOS_VERSION_SIZE 32
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/* mailbox 1: public acpi methods */
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typedef struct {
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u32 drdy;
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u32 csts;
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u32 cevt;
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u8 reserved1[20];
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u32 didl[8];
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u32 cpdl[8];
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u32 cadl[8];
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u32 nadl[8];
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u32 aslp;
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u32 tidx;
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u32 chpd;
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u32 clid;
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u32 cdck;
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u32 sxsw;
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u32 evts;
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u32 cnot;
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u32 nrdy;
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u8 reserved2[60];
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} __attribute__((packed)) opregion_mailbox1_t;
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/* mailbox 2: software sci interface */
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typedef struct {
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u32 scic;
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u32 parm;
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u32 dslp;
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u8 reserved[244];
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} __attribute__((packed)) opregion_mailbox2_t;
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/* mailbox 3: power conservation */
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typedef struct {
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u32 ardy;
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u32 aslc;
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u32 tche;
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u32 alsi;
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u32 bclp;
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u32 pfit;
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u32 cblv;
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u16 bclm[20];
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u32 cpfm;
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u32 epfm;
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u8 plut[74];
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u32 pfmb;
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u32 ccdv;
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u32 pcft;
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u8 reserved[94];
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} __attribute__((packed)) opregion_mailbox3_t;
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#define IGD_BACKLIGHT_BRIGHTNESS 0xff
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#define IGD_INITIAL_BRIGHTNESS 0x64
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#define IGD_FIELD_VALID (1 << 31)
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#define IGD_WORD_FIELD_VALID (1 << 15)
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#define IGD_PFIT_STRETCH 6
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/* mailbox 4: vbt */
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typedef struct {
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u8 gvd1[7168];
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} __attribute__((packed)) opregion_vbt_t;
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/* IGD OpRegion */
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typedef struct {
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opregion_header_t header;
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opregion_mailbox1_t mailbox1;
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opregion_mailbox2_t mailbox2;
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opregion_mailbox3_t mailbox3;
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opregion_vbt_t vbt;
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} __attribute__((packed)) igd_opregion_t;
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/* Intel Video BIOS (Option ROM) */
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typedef struct {
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u16 signature;
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u8 size;
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u8 reserved[21];
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u16 pcir_offset;
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u16 vbt_offset;
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} __attribute__((packed)) optionrom_header_t;
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#define OPROM_SIGNATURE 0xaa55
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typedef struct {
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u32 signature;
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u16 vendor;
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u16 device;
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u16 reserved1;
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u16 length;
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u8 revision;
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u8 classcode[3];
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u16 imagelength;
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u16 coderevision;
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u8 codetype;
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u8 indicator;
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u16 reserved2;
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} __attribute__((packed)) optionrom_pcir_t;
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typedef struct {
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u8 hdr_signature[20];
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u16 hdr_version;
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u16 hdr_size;
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u16 hdr_vbt_size;
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u8 hdr_vbt_checksum;
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u8 hdr_reserved;
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u32 hdr_vbt_datablock;
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u32 hdr_aim[4];
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u8 datahdr_signature[16];
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u16 datahdr_version;
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u16 datahdr_size;
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u16 datahdr_datablocksize;
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u8 coreblock_id;
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u16 coreblock_size;
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u16 coreblock_biossize;
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u8 coreblock_biostype;
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u8 coreblock_releasestatus;
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u8 coreblock_hwsupported;
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u8 coreblock_integratedhw;
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u8 coreblock_biosbuild[4];
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u8 coreblock_biossignon[155];
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} __attribute__((packed)) optionrom_vbt_t;
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#endif /* _COMMON_GMA_H_ */
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@ -0,0 +1,59 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Intel Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <string.h>
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#include "gma.h"
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#include "opregion.h"
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#include "vbt.h"
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int init_igd_opregion(igd_opregion_t *opregion)
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{
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struct region_device vbt_rdev;
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optionrom_vbt_t *vbt;
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if (locate_vbt(&vbt_rdev) == CB_ERR) {
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printk(BIOS_ERR, "VBT not found\n");
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return 0;
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};
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vbt = rdev_mmap_full(&vbt_rdev);
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if (!vbt) {
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printk(BIOS_ERR, "VBT couldn't be read\n");
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return 0;
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}
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memset(opregion, 0, sizeof(igd_opregion_t));
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memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE,
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sizeof(IGD_OPREGION_SIGNATURE));
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memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild,
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ARRAY_SIZE(vbt->coreblock_biosbuild));
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memcpy(opregion->vbt.gvd1, vbt, MIN(vbt->hdr_vbt_size,
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sizeof(opregion->vbt.gvd1)));
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/* 8KiB */
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opregion->header.size = sizeof(igd_opregion_t) / KiB;
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opregion->header.version = IGD_OPREGION_VERSION;
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/* FIXME We just assume we're mobile for now */
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opregion->header.mailboxes = MAILBOXES_MOBILE;
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rdev_munmap(&vbt_rdev, vbt);
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return 1;
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}
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@ -0,0 +1,24 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Intel Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _COMMON_OPREGION_H_
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#define _COMMON_OPREGION_H_
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#include "gma.h"
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/* Loads vbt and initializes opregion. Returns non-zero on success */
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int init_igd_opregion(igd_opregion_t *opregion);
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#endif /* _COMMON_OPREGION_H_ */
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