GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

armv7/exynos: remove some stale files leftover from initial import 

This removes some files leftover from the initial port. Some are
leftover from U-Boot and some were leftover from the skeleton code
derived from x86.

There's a bit more that we'll get in another sweep.

Change-Id: I325793ecb902b3b9430dcf531714ce025d201de6
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2380
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
David Hendricks 2013-02-12 22:57:04 -08:00
parent b25208fc8b
commit dc8259ce1d
9 changed files with 0 additions and 2252 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

791
src/arch/armv7/boot/acpi.c
View File

@ -1,791 +0,0 @@
/*
* This file is part of the coreboot project.
*
* coreboot ACPI Table support
* written by Stefan Reinauer <stepan@openbios.org>
*
* Copyright (C) 2004 SUSE LINUX AG
* Copyright (C) 2005-2009 coresystems GmbH
*
* ACPI FADT, FACS, and DSDT table support added by
* Nick Barker <nick.barker9@btinternet.com>, and those portions
* Copyright (C) 2004 Nick Barker
*
* Copyright (C) 2005 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
* 2005.9 yhlu add SRAT table generation
*/
/*
* Each system port implementing ACPI has to provide two functions:
*
* write_acpi_tables()
* acpi_dump_apics()
*
* See Kontron 986LCD-M port for a good example of an ACPI implementation
* in coreboot.
*/
#include <console/console.h>
#include <string.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <device/pci.h>
#include <cbmem.h>
#include <cpu/x86/lapic_def.h>
#include <cpu/cpu.h>
#if CONFIG_COLLECT_TIMESTAMPS
#include <timestamp.h>
#endif
/* FIXME: Kconfig doesn't support overridable defaults :-( */
#ifndef CONFIG_HPET_MIN_TICKS
#define CONFIG_HPET_MIN_TICKS 0x1000
#endif
u8 acpi_checksum(u8 *table, u32 length)
{
u8 ret = 0;
while (length--) {
ret += *table;
table++;
}
return -ret;
}
/**
* Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
* and checksum.
*/
void acpi_add_table(acpi_rsdp_t *rsdp, void *table)
{
int i, entries_num;
acpi_rsdt_t *rsdt;
acpi_xsdt_t *xsdt = NULL;
/* The RSDT is mandatory... */
rsdt = (acpi_rsdt_t *)rsdp->rsdt_address;
/* ...while the XSDT is not. */
if (rsdp->xsdt_address)
xsdt = (acpi_xsdt_t *)((u32)rsdp->xsdt_address);
/* This should always be MAX_ACPI_TABLES. */
entries_num = ARRAY_SIZE(rsdt->entry);
for (i = 0; i < entries_num; i++) {
if (rsdt->entry[i] == 0)
break;
}
if (i >= entries_num) {
printk(BIOS_ERR, "ACPI: Error: Could not add ACPI table, "
"too many tables.\n");
return;
}
/* Add table to the RSDT. */
rsdt->entry[i] = (u32)table;
/* Fix RSDT length or the kernel will assume invalid entries. */
rsdt->header.length = sizeof(acpi_header_t) + (sizeof(u32) * (i + 1));
/* Re-calculate checksum. */
rsdt->header.checksum = 0; /* Hope this won't get optimized away */
rsdt->header.checksum = acpi_checksum((u8 *)rsdt, rsdt->header.length);
/*
* And now the same thing for the XSDT. We use the same index as for
* now we want the XSDT and RSDT to always be in sync in coreboot.
*/
if (xsdt) {
/* Add table to the XSDT. */
xsdt->entry[i] = (u64)(u32)table;
/* Fix XSDT length. */
xsdt->header.length = sizeof(acpi_header_t) +
(sizeof(u64) * (i + 1));
/* Re-calculate checksum. */
xsdt->header.checksum = 0;
xsdt->header.checksum = acpi_checksum((u8 *)xsdt,
xsdt->header.length);
}
printk(BIOS_DEBUG, "ACPI: added table %d/%d, length now %d\n",
i + 1, entries_num, rsdt->header.length);
}
int acpi_create_mcfg_mmconfig(acpi_mcfg_mmconfig_t *mmconfig, u32 base,
u16 seg_nr, u8 start, u8 end)
{
mmconfig->base_address = base;
mmconfig->base_reserved = 0;
mmconfig->pci_segment_group_number = seg_nr;
mmconfig->start_bus_number = start;
mmconfig->end_bus_number = end;
return sizeof(acpi_mcfg_mmconfig_t);
}
int acpi_create_madt_lapic(acpi_madt_lapic_t *lapic, u8 cpu, u8 apic)
{
lapic->type = 0; /* Local APIC structure */
lapic->length = sizeof(acpi_madt_lapic_t);
lapic->flags = (1 << 0); /* Processor/LAPIC enabled */
lapic->processor_id = cpu;
lapic->apic_id = apic;
return lapic->length;
}
unsigned long acpi_create_madt_lapics(unsigned long current)
{
device_t cpu;
int index = 0;
for (cpu = all_devices; cpu; cpu = cpu->next) {
if ((cpu->path.type != DEVICE_PATH_APIC) ||
(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
continue;
}
if (!cpu->enabled)
continue;
current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current,
index, cpu->path.apic.apic_id);
index++;
}
return current;
}
int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,
u32 gsi_base)
{
ioapic->type = 1; /* I/O APIC structure */
ioapic->length = sizeof(acpi_madt_ioapic_t);
ioapic->reserved = 0x00;
ioapic->gsi_base = gsi_base;
ioapic->ioapic_id = id;
ioapic->ioapic_addr = addr;
return ioapic->length;
}
int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
u8 bus, u8 source, u32 gsirq, u16 flags)
{
irqoverride->type = 2; /* Interrupt source override */
irqoverride->length = sizeof(acpi_madt_irqoverride_t);
irqoverride->bus = bus;
irqoverride->source = source;
irqoverride->gsirq = gsirq;
irqoverride->flags = flags;
return irqoverride->length;
}
int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu,
u16 flags, u8 lint)
{
lapic_nmi->type = 4; /* Local APIC NMI structure */
lapic_nmi->length = sizeof(acpi_madt_lapic_nmi_t);
lapic_nmi->flags = flags;
lapic_nmi->processor_id = cpu;
lapic_nmi->lint = lint;
return lapic_nmi->length;
}
void acpi_create_madt(acpi_madt_t *madt)
{
acpi_header_t *header = &(madt->header);
unsigned long current = (unsigned long)madt + sizeof(acpi_madt_t);
memset((void *)madt, 0, sizeof(acpi_madt_t));
/* Fill out header fields. */
memcpy(header->signature, "APIC", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_madt_t);
header->revision = 1; /* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
madt->lapic_addr = LOCAL_APIC_ADDR;
madt->flags = 0x1; /* PCAT_COMPAT */
current = acpi_fill_madt(current);
/* (Re)calculate length and checksum. */
header->length = current - (unsigned long)madt;
header->checksum = acpi_checksum((void *)madt, header->length);
}
/* MCFG is defined in the PCI Firmware Specification 3.0. */
void acpi_create_mcfg(acpi_mcfg_t *mcfg)
{
acpi_header_t *header = &(mcfg->header);
unsigned long current = (unsigned long)mcfg + sizeof(acpi_mcfg_t);
memset((void *)mcfg, 0, sizeof(acpi_mcfg_t));
/* Fill out header fields. */
memcpy(header->signature, "MCFG", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_mcfg_t);
header->revision = 1;
current = acpi_fill_mcfg(current);
/* (Re)calculate length and checksum. */
header->length = current - (unsigned long)mcfg;
header->checksum = acpi_checksum((void *)mcfg, header->length);
}
/*
* This can be overriden by platform ACPI setup code, if it calls
* acpi_create_ssdt_generator().
*/
unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(
unsigned long current, const char *oem_table_id)
{
return current;
}
void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id)
{
unsigned long current = (unsigned long)ssdt + sizeof(acpi_header_t);
memset((void *)ssdt, 0, sizeof(acpi_header_t));
memcpy(&ssdt->signature, "SSDT", 4);
ssdt->revision = 2; /* ACPI 1.0/2.0: ?, ACPI 3.0/4.0: 2 */
memcpy(&ssdt->oem_id, OEM_ID, 6);
memcpy(&ssdt->oem_table_id, oem_table_id, 8);
ssdt->oem_revision = 42;
memcpy(&ssdt->asl_compiler_id, ASLC, 4);
ssdt->asl_compiler_revision = 42;
ssdt->length = sizeof(acpi_header_t);
acpigen_set_current((char *) current);
current = acpi_fill_ssdt_generator(current, oem_table_id);
/* (Re)calculate length and checksum. */
ssdt->length = current - (unsigned long)ssdt;
ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length);
}
int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic)
{
memset((void *)lapic, 0, sizeof(acpi_srat_lapic_t));
lapic->type = 0; /* Processor local APIC/SAPIC affinity structure */
lapic->length = sizeof(acpi_srat_lapic_t);
lapic->flags = (1 << 0); /* Enabled (the use of this structure). */
lapic->proximity_domain_7_0 = node;
/* TODO: proximity_domain_31_8, local SAPIC EID, clock domain. */
lapic->apic_id = apic;
return lapic->length;
}
int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
u32 flags)
{
mem->type = 1; /* Memory affinity structure */
mem->length = sizeof(acpi_srat_mem_t);
mem->base_address_low = (basek << 10);
mem->base_address_high = (basek >> (32 - 10));
mem->length_low = (sizek << 10);
mem->length_high = (sizek >> (32 - 10));
mem->proximity_domain = node;
mem->flags = flags;
return mem->length;
}
/* http://www.microsoft.com/whdc/system/sysinternals/sratdwn.mspx */
void acpi_create_srat(acpi_srat_t *srat)
{
acpi_header_t *header = &(srat->header);
unsigned long current = (unsigned long)srat + sizeof(acpi_srat_t);
memset((void *)srat, 0, sizeof(acpi_srat_t));
/* Fill out header fields. */
memcpy(header->signature, "SRAT", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_srat_t);
header->revision = 1; /* ACPI 1.0: N/A, 2.0: 1, 3.0: 2, 4.0: 3 */
srat->resv = 1; /* Spec: Reserved to 1 for backwards compatibility. */
current = acpi_fill_srat(current);
/* (Re)calculate length and checksum. */
header->length = current - (unsigned long)srat;
header->checksum = acpi_checksum((void *)srat, header->length);
}
unsigned long __attribute__((weak)) acpi_fill_dmar(unsigned long current)
{
return current;
}
void acpi_create_dmar(acpi_dmar_t *dmar)
{
acpi_header_t *header = &(dmar->header);
unsigned long current = (unsigned long)dmar + sizeof(acpi_dmar_t);
memset((void *)dmar, 0, sizeof(acpi_dmar_t));
/* Fill out header fields. */
memcpy(header->signature, "DMAR", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_dmar_t);
header->revision = 1;
dmar->host_address_width = 40 - 1; /* FIXME: == MTRR size? */
dmar->flags = 0;
current = acpi_fill_dmar(current);
/* (Re)calculate length and checksum. */
header->length = current - (unsigned long)dmar;
header->checksum = acpi_checksum((void *)dmar, header->length);
}
unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
u16 segment, u32 bar)
{
dmar_entry_t *drhd = (dmar_entry_t *)current;
memset(drhd, 0, sizeof(*drhd));
drhd->type = DMAR_DRHD;
drhd->length = sizeof(*drhd); /* will be fixed up later */
drhd->flags = flags;
drhd->segment = segment;
drhd->bar = bar;
return drhd->length;
}
void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current)
{
dmar_entry_t *drhd = (dmar_entry_t *)base;
drhd->length = current - base;
}
unsigned long acpi_create_dmar_drhd_ds_pci(unsigned long current, u8 segment,
u8 dev, u8 fn)
{
dev_scope_t *ds = (dev_scope_t *)current;
memset(ds, 0, sizeof(*ds));
ds->type = SCOPE_PCI_ENDPOINT;
ds->length = sizeof(*ds) + 2; /* we don't support longer paths yet */
ds->start_bus = segment;
ds->path[0].dev = dev;
ds->path[0].fn = fn;
return ds->length;
}
/* http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/slit.pdf */
void acpi_create_slit(acpi_slit_t *slit)
{
acpi_header_t *header = &(slit->header);
unsigned long current = (unsigned long)slit + sizeof(acpi_slit_t);
memset((void *)slit, 0, sizeof(acpi_slit_t));
/* Fill out header fields. */
memcpy(header->signature, "SLIT", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_slit_t);
header->revision = 1; /* ACPI 1.0: N/A, ACPI 2.0/3.0/4.0: 1 */
current = acpi_fill_slit(current);
/* (Re)calculate length and checksum. */
header->length = current - (unsigned long)slit;
header->checksum = acpi_checksum((void *)slit, header->length);
}
/* http://www.intel.com/hardwaredesign/hpetspec_1.pdf */
void acpi_create_hpet(acpi_hpet_t *hpet)
{
acpi_header_t *header = &(hpet->header);
acpi_addr_t *addr = &(hpet->addr);
memset((void *)hpet, 0, sizeof(acpi_hpet_t));
/* Fill out header fields. */
memcpy(header->signature, "HPET", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_hpet_t);
header->revision = 1; /* Currently 1. Table added in ACPI 2.0. */
/* Fill out HPET address. */
addr->space_id = 0; /* Memory */
addr->bit_width = 64;
addr->bit_offset = 0;
addr->addrl = CONFIG_HPET_ADDRESS & 0xffffffff;
addr->addrh = ((unsigned long long)CONFIG_HPET_ADDRESS) >> 32;
hpet->id = *(unsigned int*)CONFIG_HPET_ADDRESS;
hpet->number = 0;
hpet->min_tick = CONFIG_HPET_MIN_TICKS;
header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
}
void acpi_create_facs(acpi_facs_t *facs)
{
memset((void *)facs, 0, sizeof(acpi_facs_t));
memcpy(facs->signature, "FACS", 4);
facs->length = sizeof(acpi_facs_t);
facs->hardware_signature = 0;
facs->firmware_waking_vector = 0;
facs->global_lock = 0;
facs->flags = 0;
facs->x_firmware_waking_vector_l = 0;
facs->x_firmware_waking_vector_h = 0;
facs->version = 1; /* ACPI 1.0: 0, ACPI 2.0/3.0: 1, ACPI 4.0: 2 */
}
void acpi_write_rsdt(acpi_rsdt_t *rsdt)
{
acpi_header_t *header = &(rsdt->header);
/* Fill out header fields. */
memcpy(header->signature, "RSDT", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_rsdt_t);
header->revision = 1; /* ACPI 1.0/2.0/3.0/4.0: 1 */
/* Entries are filled in later, we come with an empty set. */
/* Fix checksum. */
header->checksum = acpi_checksum((void *)rsdt, sizeof(acpi_rsdt_t));
}
void acpi_write_xsdt(acpi_xsdt_t *xsdt)
{
acpi_header_t *header = &(xsdt->header);
/* Fill out header fields. */
memcpy(header->signature, "XSDT", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_xsdt_t);
header->revision = 1; /* ACPI 1.0: N/A, 2.0/3.0/4.0: 1 */
/* Entries are filled in later, we come with an empty set. */
/* Fix checksum. */
header->checksum = acpi_checksum((void *)xsdt, sizeof(acpi_xsdt_t));
}
void acpi_write_rsdp(acpi_rsdp_t *rsdp, acpi_rsdt_t *rsdt, acpi_xsdt_t *xsdt)
{
memset(rsdp, 0, sizeof(acpi_rsdp_t));
memcpy(rsdp->signature, RSDP_SIG, 8);
memcpy(rsdp->oem_id, OEM_ID, 6);
rsdp->length = sizeof(acpi_rsdp_t);
rsdp->rsdt_address = (u32)rsdt;
/*
* Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2.
*
* Some OSes expect an XSDT to be present for RSD PTR revisions >= 2.
* If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR
* revision 0).
*/
if (xsdt == NULL) {
rsdp->revision = 0;
} else {
rsdp->xsdt_address = (u64)(u32)xsdt;
rsdp->revision = 2;
}
/* Calculate checksums. */
rsdp->checksum = acpi_checksum((void *)rsdp, 20);
rsdp->ext_checksum = acpi_checksum((void *)rsdp, sizeof(acpi_rsdp_t));
}
unsigned long __attribute__((weak)) acpi_fill_hest(acpi_hest_t *hest)
{
return (unsigned long)hest;
}
unsigned long acpi_create_hest_error_source(acpi_hest_t *hest, acpi_hest_esd_t *esd, u16 type, void *data, u16 data_len)
{
acpi_header_t *header = &(hest->header);
acpi_hest_hen_t *hen;
void *pos;
u16 len;
pos = esd;
memset(pos, 0, sizeof(acpi_hest_esd_t));
len = 0;
esd->type = type; /* MCE */
esd->source_id = hest->error_source_count;
esd->flags = 0; /* FIRMWARE_FIRST */
esd->enabled = 1;
esd->prealloc_erecords = 1;
esd->max_section_per_record = 0x1;
len += sizeof(acpi_hest_esd_t);
pos = esd + 1;
switch (type) {
case 0: /* MCE */
break;
case 1: /* CMC */
hen = (acpi_hest_hen_t *) (pos);
memset(pos, 0, sizeof(acpi_hest_hen_t));
hen->type = 3; /* SCI? */
hen->length = sizeof(acpi_hest_hen_t);
hen->conf_we = 0; /* Configuration Write Enable. */
hen->poll_interval = 0;
hen->vector = 0;
hen->sw2poll_threshold_val = 0;
hen->sw2poll_threshold_win = 0;
hen->error_threshold_val = 0;
hen->error_threshold_win = 0;
len += sizeof(acpi_hest_hen_t);
pos = hen + 1;
break;
case 2: /* NMI */
case 6: /* AER Root Port */
case 7: /* AER Endpoint */
case 8: /* AER Bridge */
case 9: /* Generic Hardware Error Source. */
/* TODO: */
break;
default:
printk(BIOS_DEBUG, "Invalid type of Error Source.");
break;
}
hest->error_source_count ++;
memcpy(pos, data, data_len);
len += data_len;
header->length += len;
return len;
}
/* ACPI 4.0 */
void acpi_write_hest(acpi_hest_t *hest)
{
acpi_header_t *header = &(hest->header);
memset(hest, 0, sizeof(acpi_hest_t));
memcpy(header->signature, "HEST", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length += sizeof(acpi_hest_t);
header->revision = 1;
acpi_fill_hest(hest);
/* Calculate checksums. */
header->checksum = acpi_checksum((void *)hest, header->length);
}
#if CONFIG_HAVE_ACPI_RESUME
void suspend_resume(void)
{
void *wake_vec;
/* If we happen to be resuming find wakeup vector and jump to OS. */
wake_vec = acpi_find_wakeup_vector();
if (wake_vec) {
#if CONFIG_HAVE_SMI_HANDLER
u32 *gnvs_address = cbmem_find(CBMEM_ID_ACPI_GNVS);
/* Restore GNVS pointer in SMM if found */
if (gnvs_address && *gnvs_address) {
printk(BIOS_DEBUG, "Restore GNVS pointer to 0x%08x\n",
*gnvs_address);
smm_setup_structures((void *)*gnvs_address, NULL, NULL);
}
#endif
/* Call mainboard resume handler first, if defined. */
if (mainboard_suspend_resume)
mainboard_suspend_resume();
post_code(POST_OS_RESUME);
acpi_jump_to_wakeup(wake_vec);
}
}
/* This is to be filled by SB code - startup value what was found. */
u8 acpi_slp_type = 0;
static int acpi_is_wakeup(void)
{
/* Both resume from S2 and resume from S3 restart at CPU reset */
return (acpi_slp_type == 3 || acpi_slp_type == 2);
}
static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp)
{
if (strncmp((char *)rsdp, RSDP_SIG, sizeof(RSDP_SIG) - 1) != 0)
return NULL;
printk(BIOS_DEBUG, "Looking on %p for valid checksum\n", rsdp);
if (acpi_checksum((void *)rsdp, 20) != 0)
return NULL;
printk(BIOS_DEBUG, "Checksum 1 passed\n");
if ((rsdp->revision > 1) && (acpi_checksum((void *)rsdp,
rsdp->length) != 0))
return NULL;
printk(BIOS_DEBUG, "Checksum 2 passed all OK\n");
return rsdp;
}
static acpi_rsdp_t *rsdp;
void *acpi_get_wakeup_rsdp(void)
{
return rsdp;
}
void *acpi_find_wakeup_vector(void)
{
char *p, *end;
acpi_rsdt_t *rsdt;
acpi_facs_t *facs;
acpi_fadt_t *fadt;
void *wake_vec;
int i;
rsdp = NULL;
if (!acpi_is_wakeup())
return NULL;
printk(BIOS_DEBUG, "Trying to find the wakeup vector...\n");
/* Find RSDP. */
for (p = (char *)0xe0000; p < (char *)0xfffff; p += 16) {
if ((rsdp = valid_rsdp((acpi_rsdp_t *)p)))
break;
}
if (rsdp == NULL)
return NULL;
printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
rsdt = (acpi_rsdt_t *) rsdp->rsdt_address;
end = (char *)rsdt + rsdt->header.length;
printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);
for (i = 0; ((char *)&rsdt->entry[i]) < end; i++) {
fadt = (acpi_fadt_t *)rsdt->entry[i];
if (strncmp((char *)fadt, "FACP", 4) == 0)
break;
fadt = NULL;
}
if (fadt == NULL)
return NULL;
printk(BIOS_DEBUG, "FADT found at %p\n", fadt);
facs = (acpi_facs_t *)fadt->firmware_ctrl;
if (facs == NULL) {
printk(BIOS_DEBUG, "No FACS found, wake up from S3 not "
"possible.\n");
return NULL;
}
printk(BIOS_DEBUG, "FACS found at %p\n", facs);
wake_vec = (void *)facs->firmware_waking_vector;
printk(BIOS_DEBUG, "OS waking vector is %p\n", wake_vec);
return wake_vec;
}
#if CONFIG_SMP
extern char *lowmem_backup;
extern char *lowmem_backup_ptr;
extern int lowmem_backup_size;
#endif
#define WAKEUP_BASE 0x600
void (*acpi_do_wakeup)(u32 vector, u32 backup_source, u32 backup_target,
u32 backup_size) __attribute__((regparm(0))) = (void *)WAKEUP_BASE;
extern unsigned char __wakeup, __wakeup_size;
void acpi_jump_to_wakeup(void *vector)
{
u32 acpi_backup_memory = (u32)cbmem_find(CBMEM_ID_RESUME);
if (!acpi_backup_memory) {
printk(BIOS_WARNING, "ACPI: Backup memory missing. "
"No S3 resume.\n");
return;
}
#if CONFIG_SMP
// FIXME: This should go into the ACPI backup memory, too. No pork saussages.
/*
* Just restore the SMP trampoline and continue with wakeup on
* assembly level.
*/
memcpy(lowmem_backup_ptr, lowmem_backup, lowmem_backup_size);
#endif
/* Copy wakeup trampoline in place. */
memcpy((void *)WAKEUP_BASE, &__wakeup, (size_t)&__wakeup_size);
#if CONFIG_COLLECT_TIMESTAMPS
timestamp_add_now(TS_ACPI_WAKE_JUMP);
#endif
acpi_do_wakeup((u32)vector, acpi_backup_memory, CONFIG_RAMBASE,
HIGH_MEMORY_SAVE);
}
#endif
void acpi_save_gnvs(u32 gnvs_address)
{
u32 *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
if (gnvs)
*gnvs = gnvs_address;
}

729
src/arch/armv7/boot/acpigen.c
View File

@ -1,729 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* how many nesting we support */
#define ACPIGEN_LENSTACK_SIZE 10
/* if you need to change this, change the acpigen_write_f and
acpigen_patch_len */
#define ACPIGEN_MAXLEN 0xfff
#include <string.h>
#include <arch/acpigen.h>
#include <console/console.h>
#include <device/device.h>
static char *gencurrent;
char *len_stack[ACPIGEN_LENSTACK_SIZE];
int ltop = 0;
int acpigen_write_len_f(void)
{
ASSERT(ltop < (ACPIGEN_LENSTACK_SIZE - 1))
len_stack[ltop++] = gencurrent;
acpigen_emit_byte(0);
acpigen_emit_byte(0);
return 2;
}
void acpigen_patch_len(int len)
{
ASSERT(len <= ACPIGEN_MAXLEN)
ASSERT(ltop > 0)
char *p = len_stack[--ltop];
/* generate store length for 0xfff max */
p[0] = (0x40 | (len & 0xf));
p[1] = (len >> 4 & 0xff);
}
void acpigen_set_current(char *curr)
{
gencurrent = curr;
}
char *acpigen_get_current(void)
{
return gencurrent;
}
int acpigen_emit_byte(unsigned char b)
{
(*gencurrent++) = b;
return 1;
}
int acpigen_write_package(int nr_el)
{
int len;
/* package op */
acpigen_emit_byte(0x12);
len = acpigen_write_len_f();
acpigen_emit_byte(nr_el);
return len + 2;
}
int acpigen_write_byte(unsigned int data)
{
/* byte op */
acpigen_emit_byte(0xa);
acpigen_emit_byte(data & 0xff);
return 2;
}
int acpigen_write_dword(unsigned int data)
{
/* dword op */
acpigen_emit_byte(0xc);
acpigen_emit_byte(data & 0xff);
acpigen_emit_byte((data >> 8) & 0xff);
acpigen_emit_byte((data >> 16) & 0xff);
acpigen_emit_byte((data >> 24) & 0xff);
return 5;
}
int acpigen_write_qword(uint64_t data)
{
/* qword op */
acpigen_emit_byte(0xe);
acpigen_emit_byte(data & 0xff);
acpigen_emit_byte((data >> 8) & 0xff);
acpigen_emit_byte((data >> 16) & 0xff);
acpigen_emit_byte((data >> 24) & 0xff);
acpigen_emit_byte((data >> 32) & 0xff);
acpigen_emit_byte((data >> 40) & 0xff);
acpigen_emit_byte((data >> 48) & 0xff);
acpigen_emit_byte((data >> 56) & 0xff);
return 9;
}
int acpigen_write_name_byte(const char *name, uint8_t val)
{
int len;
len = acpigen_write_name(name);
len += acpigen_write_byte(val);
return len;
}
int acpigen_write_name_dword(const char *name, uint32_t val)
{
int len;
len = acpigen_write_name(name);
len += acpigen_write_dword(val);
return len;
}
int acpigen_write_name_qword(const char *name, uint64_t val)
{
int len;
len = acpigen_write_name(name);
len += acpigen_write_qword(val);
return len;
}
int acpigen_emit_stream(const char *data, int size)
{
int i;
for (i = 0; i < size; i++) {
acpigen_emit_byte(data[i]);
}
return size;
}
/* The NameString are bit tricky, each element can be 4 chars, if
less its padded with underscore. Check 18.2.2 and 18.4
and 5.3 of ACPI specs 3.0 for details
*/
static int acpigen_emit_simple_namestring(const char *name) {
int i, len = 0;
char ud[] = "____";
for (i = 0; i < 4; i++) {
if ((name[i] == '\0') || (name[i] == '.')) {
len += acpigen_emit_stream(ud, 4 - i);
break;
} else {
len += acpigen_emit_byte(name[i]);
}
}
return len;
}
static int acpigen_emit_double_namestring(const char *name, int dotpos) {
int len = 0;
/* mark dual name prefix */
len += acpigen_emit_byte(0x2e);
len += acpigen_emit_simple_namestring(name);
len += acpigen_emit_simple_namestring(&name[dotpos + 1]);
return len;
}
static int acpigen_emit_multi_namestring(const char *name) {
int len = 0, count = 0;
unsigned char *pathlen;
/* mark multi name prefix */
len += acpigen_emit_byte(0x2f);
len += acpigen_emit_byte(0x0);
pathlen = ((unsigned char *) acpigen_get_current()) - 1;
while (name[0] != '\0') {
len += acpigen_emit_simple_namestring(name);
/* find end or next entity */
while ((name[0] != '.') && (name[0] != '\0'))
name++;
/* forward to next */
if (name[0] == '.')
name++;
count++;
}
pathlen[0] = count;
return len;
}
int acpigen_emit_namestring(const char *namepath) {
int dotcount = 0, i;
int dotpos = 0;
int len = 0;
/* we can start with a \ */
if (namepath[0] == '\\') {
len += acpigen_emit_byte('\\');
namepath++;
}
/* and there can be any number of ^ */
while (namepath[0] == '^') {
len += acpigen_emit_byte('^');
namepath++;
}
ASSERT(namepath[0] != '\0');
i = 0;
while (namepath[i] != '\0') {
if (namepath[i] == '.') {
dotcount++;
dotpos = i;
}
i++;
}
if (dotcount == 0) {
len += acpigen_emit_simple_namestring(namepath);
} else if (dotcount == 1) {
len += acpigen_emit_double_namestring(namepath, dotpos);
} else {
len += acpigen_emit_multi_namestring(namepath);
}
return len;
}
int acpigen_write_name(const char *name)
{
int len;
/* name op */
len = acpigen_emit_byte(0x8);
return len + acpigen_emit_namestring(name);
}
int acpigen_write_scope(const char *name)
{
int len;
/* scope op */
len = acpigen_emit_byte(0x10);
len += acpigen_write_len_f();
return len + acpigen_emit_namestring(name);
}
int acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len)
{
/*
Processor (\_PR.CPUcpuindex, cpuindex, pblock_addr, pblock_len)
{
*/
char pscope[16];
int len;
/* processor op */
acpigen_emit_byte(0x5b);
acpigen_emit_byte(0x83);
len = acpigen_write_len_f();
sprintf(pscope, "\\_PR.CPU%x", (unsigned int) cpuindex);
len += acpigen_emit_namestring(pscope);
acpigen_emit_byte(cpuindex);
acpigen_emit_byte(pblock_addr & 0xff);
acpigen_emit_byte((pblock_addr >> 8) & 0xff);
acpigen_emit_byte((pblock_addr >> 16) & 0xff);
acpigen_emit_byte((pblock_addr >> 24) & 0xff);
acpigen_emit_byte(pblock_len);
return 6 + 2 + len;
}
int acpigen_write_empty_PCT(void)
{
/*
Name (_PCT, Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
*/
static char stream[] = {
0x08, 0x5F, 0x50, 0x43, 0x54, 0x12, 0x2C, /* 00000030 "0._PCT.," */
0x02, 0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, /* 00000038 "........" */
0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00000040 "........" */
0x00, 0x00, 0x00, 0x00, 0x79, 0x00, 0x11, 0x14, /* 00000048 "....y..." */
0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F, 0x00, 0x00, /* 00000050 "........" */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00000058 "........" */
0x00, 0x79, 0x00
};
return acpigen_emit_stream(stream, ARRAY_SIZE(stream));
}
int acpigen_write_empty_PTC(void)
{
/*
Name (_PTC, Package (0x02)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
},
ResourceTemplate ()
{
Register (FFixedHW,
0x00, // Bit Width
0x00, // Bit Offset
0x0000000000000000, // Address
,)
}
})
*/
int len, nlen, rlen;
acpi_addr_t addr = {
.space_id = ACPI_ADDRESS_SPACE_FIXED,
.bit_width = 0,
.bit_offset = 0,
{
.resv = 0
},
.addrl = 0,
.addrh = 0,
};
nlen = acpigen_write_name("_PTC");
len = acpigen_write_package(2);
/* ControlRegister */
rlen = acpigen_write_resourcetemplate_header();
rlen += acpigen_write_register(&addr);
len += acpigen_write_resourcetemplate_footer(rlen);
len += rlen;
/* StatusRegister */
rlen = acpigen_write_resourcetemplate_header();
rlen += acpigen_write_register(&addr);
len += acpigen_write_resourcetemplate_footer(rlen);
len += rlen;
acpigen_patch_len(len - 1);
return len + nlen;
}
/* generates a func with max supported P states */
int acpigen_write_PPC(u8 nr)
{
/*
Method (_PPC, 0, NotSerialized)
{
Return (nr)
}
*/
int len;
/* method op */
acpigen_emit_byte(0x14);
len = acpigen_write_len_f();
len += acpigen_emit_namestring("_PPC");
/* no fnarg */
acpigen_emit_byte(0x00);
/* return */
acpigen_emit_byte(0xa4);
/* arg */
len += acpigen_write_byte(nr);
/* add all single bytes */
len += 3;
acpigen_patch_len(len - 1);
return len;
}
/* generates a func with max supported P states */
int acpigen_write_PPC_NVS(void)
{
/*
Method (_PPC, 0, NotSerialized)
{
Return (PPCM)
}
*/
int len;
/* method op */
acpigen_emit_byte(0x14);
len = acpigen_write_len_f();
len += acpigen_emit_namestring("_PPC");
/* no fnarg */
acpigen_emit_byte(0x00);
/* return */
acpigen_emit_byte(0xa4);
/* arg */
len += acpigen_emit_namestring("PPCM");
/* add all single bytes */
len += 3;
acpigen_patch_len(len - 1);
return len;
}
int acpigen_write_TPC(const char *gnvs_tpc_limit)
{
/*
// Sample _TPC method
Method (_TPC, 0, NotSerialized)
{
Return (\TLVL)
}
*/
int len;
len = acpigen_emit_byte(0x14); /* MethodOp */
len += acpigen_write_len_f(); /* PkgLength */
len += acpigen_emit_namestring("_TPC");
len += acpigen_emit_byte(0x00); /* No Arguments */
len += acpigen_emit_byte(0xa4); /* ReturnOp */
len += acpigen_emit_namestring(gnvs_tpc_limit);
acpigen_patch_len(len - 1);
return len;
}
int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat,
u32 busmLat, u32 control, u32 status)
{
int len;
len = acpigen_write_package(6);
len += acpigen_write_dword(coreFreq);
len += acpigen_write_dword(power);
len += acpigen_write_dword(transLat);
len += acpigen_write_dword(busmLat);
len += acpigen_write_dword(control);
len += acpigen_write_dword(status);
// pkglen without the len opcode
acpigen_patch_len(len - 1);
printk(BIOS_DEBUG, "PSS: %uMHz power %u control 0x%x status 0x%x\n",
coreFreq, power, control, status);
return len;
}
int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype)
{
int len, lenh, lenp;
lenh = acpigen_write_name("_PSD");
lenp = acpigen_write_package(1);
len = acpigen_write_package(5);
len += acpigen_write_byte(5); // 5 values
len += acpigen_write_byte(0); // revision 0
len += acpigen_write_dword(domain);
len += acpigen_write_dword(coordtype);
len += acpigen_write_dword(numprocs);
acpigen_patch_len(len - 1);
len += lenp;
acpigen_patch_len(len - 1);
return len + lenh;
}
int acpigen_write_CST_package_entry(acpi_cstate_t *cstate)
{
int len, len0;
char *start, *end;
len0 = acpigen_write_package(4);
len = acpigen_write_resourcetemplate_header();
start = acpigen_get_current();
acpigen_write_register(&cstate->resource);
end = acpigen_get_current();
len += end - start;
len += acpigen_write_resourcetemplate_footer(len);
len += len0;
len += acpigen_write_dword(cstate->ctype);
len += acpigen_write_dword(cstate->latency);
len += acpigen_write_dword(cstate->power);
acpigen_patch_len(len - 1);
return len;
}
int acpigen_write_CST_package(acpi_cstate_t *cstate, int nentries)
{
int len, lenh, lenp, i;
lenh = acpigen_write_name("_CST");
lenp = acpigen_write_package(nentries+1);
len = acpigen_write_dword(nentries);
for (i = 0; i < nentries; i++)
len += acpigen_write_CST_package_entry(cstate + i);
len += lenp;
acpigen_patch_len(len - 1);
return len + lenh;
}
int acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list)
{
/*
Sample _TSS package with 100% and 50% duty cycles
Name (_TSS, Package (0x02)
{
Package(){100, 1000, 0, 0x00, 0)
Package(){50, 520, 0, 0x18, 0)
})
*/
int i, len, plen, nlen;
acpi_tstate_t *tstate = tstate_list;
nlen = acpigen_write_name("_TSS");
plen = acpigen_write_package(entries);
for (i = 0; i < entries; i++) {
len = acpigen_write_package(5);
len += acpigen_write_dword(tstate->percent);
len += acpigen_write_dword(tstate->power);
len += acpigen_write_dword(tstate->latency);
len += acpigen_write_dword(tstate->control);
len += acpigen_write_dword(tstate->status);
acpigen_patch_len(len - 1);
tstate++;
plen += len;
}
acpigen_patch_len(plen - 1);
return plen + nlen;
}
int acpigen_write_TSD_package(u32 domain, u32 numprocs, PSD_coord coordtype)
{
int len, lenh, lenp;
lenh = acpigen_write_name("_TSD");
lenp = acpigen_write_package(1);
len = acpigen_write_package(5);
len += acpigen_write_byte(5); // 5 values
len += acpigen_write_byte(0); // revision 0
len += acpigen_write_dword(domain);
len += acpigen_write_dword(coordtype);
len += acpigen_write_dword(numprocs);
acpigen_patch_len(len - 1);
len += lenp;
acpigen_patch_len(len - 1);
return len + lenh;
}
int acpigen_write_mem32fixed(int readwrite, u32 base, u32 size)
{
/*
* acpi 4.0 section 6.4.3.4: 32-Bit Fixed Memory Range Descriptor
* Byte 0:
* Bit7 : 1 => big item
* Bit6-0: 0000110 (0x6) => 32-bit fixed memory
*/
acpigen_emit_byte(0x86);
/* Byte 1+2: length (0x0009) */
acpigen_emit_byte(0x09);
acpigen_emit_byte(0x00);
/* bit1-7 are ignored */
acpigen_emit_byte(readwrite ? 0x01 : 0x00);
acpigen_emit_byte(base & 0xff);
acpigen_emit_byte((base >> 8) & 0xff);
acpigen_emit_byte((base >> 16) & 0xff);
acpigen_emit_byte((base >> 24) & 0xff);
acpigen_emit_byte(size & 0xff);
acpigen_emit_byte((size >> 8) & 0xff);
acpigen_emit_byte((size >> 16) & 0xff);
acpigen_emit_byte((size >> 24) & 0xff);
return 12;
}
int acpigen_write_register(acpi_addr_t *addr)
{
acpigen_emit_byte(0x82); /* Register Descriptor */
acpigen_emit_byte(0x0c); /* Register Length 7:0 */
acpigen_emit_byte(0x00); /* Register Length 15:8 */
acpigen_emit_byte(addr->space_id); /* Address Space ID */
acpigen_emit_byte(addr->bit_width); /* Register Bit Width */
acpigen_emit_byte(addr->bit_offset); /* Register Bit Offset */
acpigen_emit_byte(addr->resv); /* Register Access Size */
acpigen_emit_byte(addr->addrl & 0xff); /* Register Address Low */
acpigen_emit_byte((addr->addrl >> 8) & 0xff);
acpigen_emit_byte((addr->addrl >> 16) & 0xff);
acpigen_emit_byte((addr->addrl >> 24) & 0xff);
acpigen_emit_byte(addr->addrh & 0xff); /* Register Address High */
acpigen_emit_byte((addr->addrh >> 8) & 0xff);
acpigen_emit_byte((addr->addrh >> 16) & 0xff);
acpigen_emit_byte((addr->addrh >> 24) & 0xff);
return 15;
}
int acpigen_write_io16(u16 min, u16 max, u8 align, u8 len, u8 decode16)
{
/*
* acpi 4.0 section 6.4.2.6: I/O Port Descriptor
* Byte 0:
* Bit7 : 0 => small item
* Bit6-3: 1000 (0x8) => I/O port descriptor
* Bit2-0: 111 (0x7) => 7 Bytes long
*/
acpigen_emit_byte(0x47);
/* does the device decode all 16 or just 10 bits? */
/* bit1-7 are ignored */
acpigen_emit_byte(decode16 ? 0x01 : 0x00);
/* minimum base address the device may be configured for */
acpigen_emit_byte(min & 0xff);
acpigen_emit_byte((min >> 8) & 0xff);
/* maximum base address the device may be configured for */
acpigen_emit_byte(max & 0xff);
acpigen_emit_byte((max >> 8) & 0xff);
/* alignment for min base */
acpigen_emit_byte(align & 0xff);
acpigen_emit_byte(len & 0xff);
return 8;
}
int acpigen_write_resourcetemplate_header(void)
{
int len;
/*
* A ResourceTemplate() is a Buffer() with a
* (Byte|Word|DWord) containing the length, followed by one or more
* resource items, terminated by the end tag
* (small item 0xf, len 1)
*/
len = acpigen_emit_byte(0x11); /* Buffer opcode */
len += acpigen_write_len_f();
len += acpigen_emit_byte(0x0b); /* Word opcode */
len_stack[ltop++] = acpigen_get_current();
len += acpigen_emit_byte(0x00);
len += acpigen_emit_byte(0x00);
return len;
}
int acpigen_write_resourcetemplate_footer(int len)
{
char *p = len_stack[--ltop];
/*
* end tag (acpi 4.0 Section 6.4.2.8)
* 0x79 <checksum>
* 0x00 is treated as a good checksum according to the spec
* and is what iasl generates.
*/
len += acpigen_emit_byte(0x79);
len += acpigen_emit_byte(0x00);
/* patch len word */
p[0] = (len-6) & 0xff;
p[1] = ((len-6) >> 8) & 0xff;
/* patch len field */
acpigen_patch_len(len-1);
return 2;
}
static void acpigen_add_mainboard_rsvd_mem32(void *gp, struct device *dev,
struct resource *res)
{
acpigen_write_mem32fixed(0, res->base, res->size);
}
static void acpigen_add_mainboard_rsvd_io(void *gp, struct device *dev,
struct resource *res)
{
resource_t base = res->base;
resource_t size = res->size;
while (size > 0) {
resource_t sz = size > 255 ? 255 : size;
acpigen_write_io16(base, base, 0, sz, 1);
size -= sz;
base += sz;
}
}
int acpigen_write_mainboard_resource_template(void)
{
int len;
char *start;
char *end;
len = acpigen_write_resourcetemplate_header();
start = acpigen_get_current();
/* Add reserved memory ranges */
search_global_resources(
IORESOURCE_MEM | IORESOURCE_RESERVE,
IORESOURCE_MEM | IORESOURCE_RESERVE,
acpigen_add_mainboard_rsvd_mem32, 0);
/* Add reserved io ranges */
search_global_resources(
IORESOURCE_IO | IORESOURCE_RESERVE,
IORESOURCE_IO | IORESOURCE_RESERVE,
acpigen_add_mainboard_rsvd_io, 0);
end = acpigen_get_current();
len += end-start;
len += acpigen_write_resourcetemplate_footer(len);
return len;
}
int acpigen_write_mainboard_resources(const char *scope, const char *name)
{
int len;
len = acpigen_write_scope(scope);
len += acpigen_write_name(name);
len += acpigen_write_mainboard_resource_template();
acpigen_patch_len(len - 1);
return len;
}

94
src/arch/armv7/boot/wakeup.S
View File

@ -1,94 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz>
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define WAKEUP_BASE 0x600
#define RELOCATED(x) (x - __wakeup + WAKEUP_BASE)
/* CR0 bits */
#define PE (1 << 0)
.code32
.globl __wakeup
__wakeup:
/* First prepare the jmp to the resume vector */
mov 0x4(%esp), %eax /* vector */
/* last 4 bits of linear addr are taken as offset */
andw $0x0f, %ax
movw %ax, (__wakeup_offset)
mov 0x4(%esp), %eax
/* the rest is taken as segment */
shr $4, %eax
movw %ax, (__wakeup_segment)
/* Then overwrite coreboot with our backed up memory */
cld
movl 8(%esp), %esi
movl 12(%esp), %edi
movl 16(%esp), %ecx
shrl $2, %ecx
rep movsl
/* Activate the right segment descriptor real mode. */
ljmp $0x28, $RELOCATED(1f)
1:
.code16
/* 16 bit code from here on... */
/* Load the segment registers w/ properly configured
* segment descriptors. They will retain these
* configurations (limits, writability, etc.) once
* protected mode is turned off.
*/
mov $0x30, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
/* Turn off protection */
movl %cr0, %eax
andl $~PE, %eax
movl %eax, %cr0
/* Now really going into real mode */
ljmp $0, $RELOCATED(1f)
1:
movw $0x0, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
/* This is a FAR JMP to the OS waking vector. The C code changed
* the address to be correct.
*/
.byte 0xea
__wakeup_offset = RELOCATED(.)
.word 0x0000
__wakeup_segment = RELOCATED(.)
.word 0x0000
.globl __wakeup_size
__wakeup_size = ( . - __wakeup)

74
src/arch/armv7/ldscript_failover.lb
View File

@ -1,74 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Advanced Micro Devices, Inc.
* Copyright (C) 2008-2010 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
MEMORY {
rom : ORIGIN = 0xffff0000, LENGTH = 64K
}
TARGET(binary)
SECTIONS
{
/* Symbol ap_sipi_vector must be aligned to 4kB to start AP CPUs
* with Startup IPI message without RAM. Align .rom to next 4 byte
* boundary anyway, so no pad byte appears between _rom and _start.
*/
.bogus ROMLOC_MIN : {
. = CONFIG_SIPI_VECTOR_IN_ROM ? ALIGN(4096) : ALIGN(4);
ROMLOC = .;
} >rom = 0xff
/* This section might be better named .setup */
.rom ROMLOC : {
_rom = .;
ap_sipi_vector = .;
*(.rom.text);
*(.rom.data);
*(.rom.data.*);
*(.rodata.*);
_erom = .;
} >rom = 0xff
/* Allocation reserves extra 16 bytes here. Alignment requirements
* may cause the total size of a section to change when the start
* address gets applied.
*/
ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) -
(CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0);
/* Post-check proper SIPI vector. */
_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0),
"Bad SIPI vector alignment");
_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector == CONFIG_AP_SIPI_VECTOR),
"Address mismatch on AP_SIPI_VECTOR");
/DISCARD/ : {
*(.comment)
*(.note)
*(.comment.*)
*(.note.*)
*(.iplt)
*(.rel.*)
*(.igot.*)
}
}

51
src/arch/armv7/ldscript_fallback_cbfs.lb
View File

@ -1,51 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
TARGET(binary)
SECTIONS
{
. = CONFIG_ROMBASE;
/* cut _start into last 64k*/
_x = .;
. = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x;
/* This section might be better named .setup */
.rom . : {
_rom = .;
*(.text);
*(.rodata);
*(.rodata.*);
*(.data.*);
. = ALIGN(16);
_erom = .;
}
/DISCARD/ : {
*(.comment)
*(.note)
*(.comment.*)
*(.note.*)
}
_bogus = ASSERT((SIZEOF(.bss) + SIZEOF(.data)) == 0, "Do not use global variables in romstage");
}

405
src/arch/armv7/lib/bootm.c
View File

@ -1,405 +0,0 @@
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <common.h>
#include <command.h>
#include <image.h>
#include <u-boot/zlib.h>
#include <arch/byteorder.h>
#include <fdt.h>
#include <libfdt.h>
#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
defined (CONFIG_CMDLINE_TAG) || \
defined (CONFIG_INITRD_TAG) || \
defined (CONFIG_SERIAL_TAG) || \
defined (CONFIG_REVISION_TAG)
static void setup_start_tag (bd_t *bd);
# ifdef CONFIG_SETUP_MEMORY_TAGS
static void setup_memory_tags (bd_t *bd);
# endif
static void setup_commandline_tag (bd_t *bd, char *commandline);
# ifdef CONFIG_INITRD_TAG
static void setup_initrd_tag (bd_t *bd, ulong initrd_start,
ulong initrd_end);
# endif
static void setup_end_tag (bd_t *bd);
# if defined (CONFIG_VFD) || defined (CONFIG_LCD)
# if !defined(CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED)
static void setup_videolfb_tag (gd_t *gd);
# endif
# endif
static struct tag *params;
#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
static ulong get_sp(void);
#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
static int bootm_linux_fdt(int machid, bootm_headers_t *images);
#endif
void arch_lmb_reserve(struct lmb *lmb)
{
ulong sp;
/*
* Booting a (Linux) kernel image
*
* Allocate space for command line and board info - the
* address should be as high as possible within the reach of
* the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
* memory, which means far enough below the current stack
* pointer.
*/
sp = get_sp();
debug("## Current stack ends at 0x%08lx ", sp);
/* adjust sp by 1K to be safe */
sp -= 1024;
lmb_reserve(lmb, sp,
gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp);
}
static void announce_and_cleanup(void)
{
printf("\nStarting kernel ...\n\n");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
#ifdef CONFIG_USB_DEVICE
{
extern void udc_disconnect(void);
udc_disconnect();
}
#endif
cleanup_before_linux();
}
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
bd_t *bd = gd->bd;
char *s;
int machid = bd->bi_arch_number;
void (*kernel_entry)(int zero, int arch, uint params);
#ifdef CONFIG_CMDLINE_TAG
char *commandline = getenv ("bootargs");
#endif
if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
s = getenv ("machid");
if (s) {
machid = simple_strtoul (s, NULL, 16);
printf ("Using machid 0x%x from environment\n", machid);
}
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
if (images->ft_len)
return bootm_linux_fdt(machid, images);
#endif
kernel_entry = (void (*)(int, int, uint))images->ep;
debug ("## Transferring control to Linux (at address %08lx) ...\n",
(ulong) kernel_entry);
#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
defined (CONFIG_CMDLINE_TAG) || \
defined (CONFIG_INITRD_TAG) || \
defined (CONFIG_SERIAL_TAG) || \
defined (CONFIG_REVISION_TAG)
setup_start_tag (bd);
#ifdef CONFIG_SERIAL_TAG
setup_serial_tag (&params);
#endif
#ifdef CONFIG_REVISION_TAG
setup_revision_tag (&params);
#endif
#ifdef CONFIG_SETUP_MEMORY_TAGS
setup_memory_tags (bd);
#endif
#ifdef CONFIG_CMDLINE_TAG
setup_commandline_tag (bd, commandline);
#endif
#ifdef CONFIG_INITRD_TAG
if (images->rd_start && images->rd_end)
setup_initrd_tag (bd, images->rd_start, images->rd_end);
#endif
#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
#if !defined(CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED)
setup_videolfb_tag ((gd_t *) gd);
#endif
#endif
setup_end_tag (bd);
#endif
announce_and_cleanup();
kernel_entry(0, machid, bd->bi_boot_params);
/* does not return */
return 1;
}
#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
static int fixup_memory_node(void *blob)
{
bd_t *bd = gd->bd;
int bank;
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
start[bank] = bd->bi_dram[bank].start;
size[bank] = bd->bi_dram[bank].size;
}
return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
}
static int bootm_linux_fdt(int machid, bootm_headers_t *images)
{
ulong rd_len;
void (*kernel_entry)(int zero, int dt_machid, void *dtblob);
ulong of_size = images->ft_len;
char **of_flat_tree = &images->ft_addr;
ulong *initrd_start = &images->initrd_start;
ulong *initrd_end = &images->initrd_end;
struct lmb *lmb = &images->lmb;
int ret;
kernel_entry = (void (*)(int, int, void *))images->ep;
boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree);
rd_len = images->rd_end - images->rd_start;
ret = boot_ramdisk_high(lmb, images->rd_start, rd_len,
initrd_start, initrd_end);
if (ret)
return ret;
#ifdef CONFIG_OF_BOARD_SETUP
/* Try to reserve 1024 bytes for board fixups */
if (!fdt_open_into(*of_flat_tree, *of_flat_tree, of_size + 1024))
of_size += 1024;
/* Call the board-specific fixup routine */
ft_board_setup(*of_flat_tree, gd->bd);
#endif
#ifdef CONFIG_OF_UPDATE_FDT_BEFORE_BOOT
/* this must be earlier than boot_relocate_fdt */
ret = fit_update_fdt_before_boot(*of_flat_tree, &of_size);
if (ret)
return ret;
#endif
ret = boot_relocate_fdt(lmb, of_flat_tree, &of_size);
if (ret)
return ret;
debug("## Transferring control to Linux (at address %08lx) ...\n",
(ulong) kernel_entry);
fdt_chosen(*of_flat_tree, 1);
fixup_memory_node(*of_flat_tree);
fdt_fixup_ethernet(*of_flat_tree);
fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1);
announce_and_cleanup();
kernel_entry(0, machid, *of_flat_tree);
/* does not return */
return 1;
}
#endif
#if defined (CONFIG_SETUP_MEMORY_TAGS) || \
defined (CONFIG_CMDLINE_TAG) || \
defined (CONFIG_INITRD_TAG) || \
defined (CONFIG_SERIAL_TAG) || \
defined (CONFIG_REVISION_TAG)
static void setup_start_tag (bd_t *bd)
{
params = (struct tag *) bd->bi_boot_params;
params->hdr.tag = ATAG_CORE;
params->hdr.size = tag_size (tag_core);
#if defined (ATAG_CORE_FLAGS) && \
defined (ATAG_PAGE_SIZE) && \
defined (ATAG_CORE_RDEV)
params->u.core.flags = ATAG_CORE_FLAGS;
params->u.core.pagesize = ATAG_PAGE_SIZE;
params->u.core.rootdev = ATAG_CORE_RDEV;
#else
params->u.core.flags = 0;
params->u.core.pagesize = 0;
params->u.core.rootdev = 0;
#endif
params = tag_next (params);
}
#ifdef CONFIG_SETUP_MEMORY_TAGS
static void setup_memory_tags (bd_t *bd)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
params->hdr.tag = ATAG_MEM;
params->hdr.size = tag_size (tag_mem32);
params->u.mem.start = bd->bi_dram[i].start;
params->u.mem.size = bd->bi_dram[i].size;
params = tag_next (params);
}
}
#endif /* CONFIG_SETUP_MEMORY_TAGS */
static void setup_commandline_tag (bd_t *bd, char *commandline)
{
char *p;
if (!commandline)
return;
/* eat leading white space */
for (p = commandline; *p == ' '; p++);
/* skip non-existent command lines so the kernel will still
* use its default command line.
*/
if (*p == '\0')
return;
params->hdr.tag = ATAG_CMDLINE;
params->hdr.size =
(sizeof (struct tag_header) + strlen (p) + 1 + 4) >> 2;
strcpy (params->u.cmdline.cmdline, p);
params = tag_next (params);
}
#ifdef CONFIG_INITRD_TAG
static void setup_initrd_tag (bd_t *bd, ulong initrd_start, ulong initrd_end)
{
/* an ATAG_INITRD node tells the kernel where the compressed
* ramdisk can be found. ATAG_RDIMG is a better name, actually.
*/
params->hdr.tag = ATAG_INITRD2;
params->hdr.size = tag_size (tag_initrd);
params->u.initrd.start = initrd_start;
params->u.initrd.size = initrd_end - initrd_start;
params = tag_next (params);
}
#endif /* CONFIG_INITRD_TAG */
#if defined (CONFIG_VFD) || defined (CONFIG_LCD)
#if !defined(CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED)
extern ulong calc_fbsize (void);
static void setup_videolfb_tag (gd_t *gd)
{
/* An ATAG_VIDEOLFB node tells the kernel where and how large
* the framebuffer for video was allocated (among other things).
* Note that a _physical_ address is passed !
*
* We only use it to pass the address and size, the other entries
* in the tag_videolfb are not of interest.
*/
params->hdr.tag = ATAG_VIDEOLFB;
params->hdr.size = tag_size (tag_videolfb);
params->u.videolfb.lfb_base = (u32) gd->fb_base;
/* Fb size is calculated according to parameters for our panel
*/
params->u.videolfb.lfb_size = calc_fbsize();
params = tag_next (params);
}
#endif /* CONFIG_VIDEOFLB_ATAG_NOT_SUPPORTED */
#endif /* CONFIG_VFD || CONFIG_LCD */
#ifdef CONFIG_SERIAL_TAG
void setup_serial_tag (struct tag **tmp)
{
struct tag *params = *tmp;
struct tag_serialnr serialnr;
void get_board_serial(struct tag_serialnr *serialnr);
get_board_serial(&serialnr);
params->hdr.tag = ATAG_SERIAL;
params->hdr.size = tag_size (tag_serialnr);
params->u.serialnr.low = serialnr.low;
params->u.serialnr.high= serialnr.high;
params = tag_next (params);
*tmp = params;
}
#endif
#ifdef CONFIG_REVISION_TAG
void setup_revision_tag(struct tag **in_params)
{
u32 rev = 0;
u32 get_board_rev(void);
rev = get_board_rev();
params->hdr.tag = ATAG_REVISION;
params->hdr.size = tag_size (tag_revision);
params->u.revision.rev = rev;
params = tag_next (params);
}
#endif /* CONFIG_REVISION_TAG */
static void setup_end_tag (bd_t *bd)
{
params->hdr.tag = ATAG_NONE;
params->hdr.size = 0;
}
#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
static ulong get_sp(void)
{
ulong ret;
asm("mov %0, sp" : "=r"(ret) : );
return ret;
}

32
src/cpu/samsung/exynos5-common/sys_proto.h
View File

@ -1,32 +0,0 @@
/*
* Copyright (C) 2010 Samsung Electrnoics
* Minkyu Kang <mk7.kang@samsung.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _SYS_PROTO_H_
#define _SYS_PROTO_H_
u32 get_device_type(void);
void invalidate_dcache(u32);
void l2_cache_disable(void);
void l2_cache_enable(void);
#endif

27
src/cpu/samsung/exynos5250/sys_proto.h
View File

@ -1,27 +0,0 @@
/*
* (C) Copyright 2012 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef __ASM_ARM_ARCH_EXYNOS5_SYS_PROTO_H__
#define __ASM_ARM_ARCH_EXYNOS5_SYS_PROTO_H__
#include <asm/arch-exynos/sys_proto.h>
#endif /* __ASM_ARM_ARCH_EXYNOS5_SYS_PROTO_H__ */

49
src/cpu/samsung/s5p-common/Makefile.uboot
View File

@ -1,49 +0,0 @@
#
# Copyright (C) 2009 Samsung Electronics
# Minkyu Kang <mk7.kang@samsung.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)libs5p-common.o
COBJS-y += cpu_info.o
COBJS-y += timer.o
COBJS-y += sromc.o
COBJS-y += wdt.o
COBJS-$(CONFIG_PWM) += pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################