Enable both IDE ports for our qemu target.
Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3481 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -107,7 +107,14 @@ config chip.h
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chip cpu/emulation/qemu-x86
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device pci_domain 0 on
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device pci 0.0 on end
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device pci 1.0 on end
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chip southbridge/intel/i82371eb # southbridge
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device pci 01.0 on end
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device pci 01.1 on end
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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end
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# register "com1" = "{1}"
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# register "com1" = "{1, 0, 0x3f8, 4}"
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end
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