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Enable both IDE ports for our qemu target. 

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3481 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ward Vandewege 2008-08-08 00:08:01 +00:00
parent a2c951edf7
commit dc93affe72
1 changed files with 8 additions and 1 deletions
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9
src/mainboard/emulation/qemu-x86/Config.lb
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@ -107,7 +107,14 @@ config chip.h
chip cpu/emulation/qemu-x86 chip cpu/emulation/qemu-x86
device pci_domain 0 on device pci_domain 0 on
device pci 0.0 on end device pci 0.0 on end
device pci 1.0 on end
chip southbridge/intel/i82371eb # southbridge
device pci 01.0 on end
device pci 01.1 on end
register "ide0_enable" = "1"
register "ide1_enable" = "1"
end
# register "com1" = "{1}" # register "com1" = "{1}"
# register "com1" = "{1, 0, 0x3f8, 4}" # register "com1" = "{1, 0, 0x3f8, 4}"
end end