nb/amd/pi/00730F01/northbridge: rework idx in domain_read_resources
Start with the resource index 0 and increment it after reporting each resource. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I6fb59ff3d371b744b53093d17392d1c3510bef82 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -586,7 +586,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
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static void domain_read_resources(struct device *dev)
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{
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unsigned long mmio_basek;
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int idx;
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unsigned long idx = 0;
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#if CONFIG_HW_MEM_HOLE_SIZEK != 0
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struct hw_mem_hole_info mem_hole;
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#endif
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@ -611,7 +611,6 @@ static void domain_read_resources(struct device *dev)
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}
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#endif
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idx = 0x10;
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resource_t basek, limitk, sizek;
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if (get_dram_base_limit(&basek, &limitk)) {
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sizek = limitk - basek;
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@ -621,8 +620,7 @@ static void domain_read_resources(struct device *dev)
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/* See if we need a hole from 0xa0000 (640K) to 0xfffff (1024K) */
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if (basek < 640 && sizek > 1024) {
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ram_resource_kb(dev, idx, basek, 640 - basek);
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idx += 0x10;
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ram_resource_kb(dev, idx++, basek, 640 - basek);
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basek = 1024;
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sizek = limitk - basek;
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}
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@ -636,8 +634,7 @@ static void domain_read_resources(struct device *dev)
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unsigned int pre_sizek;
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pre_sizek = mmio_basek - basek;
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if (pre_sizek > 0) {
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ram_resource_kb(dev, idx, basek, pre_sizek);
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idx += 0x10;
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ram_resource_kb(dev, idx++, basek, pre_sizek);
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sizek -= pre_sizek;
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}
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basek = mmio_basek;
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@ -652,13 +649,12 @@ static void domain_read_resources(struct device *dev)
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}
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}
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ram_resource_kb(dev, idx, basek, sizek);
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idx += 0x10;
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ram_resource_kb(dev, idx++, basek, sizek);
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printk(BIOS_DEBUG, "mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
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mmio_basek, basek, limitk);
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}
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add_uma_resource_below_tolm(dev, 7);
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add_uma_resource_below_tolm(dev, idx++);
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}
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static const char *domain_acpi_name(const struct device *dev)
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