soc/amd/common/psp: Revert AMD_SOC_SEPARATE_EFS_SECTION
Reverting commit1e25fd426a
("soc/amd/common/block/psp: introduce AMD_SOC_SEPARATE_EFS_SECTION"). A better solution was used in commitc17330c1dd
("mb/amd/chausie: Add EC blob into CBFS"), and this is no longer necessary. TEST: Boot chausie Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I27a8622a1f0d871690b181a79adca225a20996ea Reviewed-on: https://review.coreboot.org/c/coreboot/+/65492 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -29,14 +29,6 @@ config SOC_AMD_PSP_SELECTABLE_SMU_FW
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fanned set of blobs. Ask your AMD representative whether your APU
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fanned set of blobs. Ask your AMD representative whether your APU
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is considered fanless.
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is considered fanless.
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config AMD_SOC_SEPARATE_EFS_SECTION
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bool
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help
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Use separate EFS FMAP section instead of putting EFS into CBFS. The
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FMAP section must begin exactly at the location the EFS needs to be
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placed in the flash. This option can be used to place the EFS right
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after the 128kByte EC firmware at the beginning of the flash.
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config SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL
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config SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL
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bool
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bool
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default n
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default n
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@ -8,11 +8,6 @@ smm-y += psp_smm.c
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bootblock-y += psp_efs.c
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bootblock-y += psp_efs.c
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verstage-y += psp_efs.c
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verstage-y += psp_efs.c
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ifeq ($(CONFIG_AMD_SOC_SEPARATE_EFS_SECTION),y)
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bootblock-y += efs_fmap_check.c
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$(call src-to-obj,bootblock,$(dir)/efs_fmap_check.c) : $(obj)/fmap_config.h
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endif # CONFIG_AMD_SOC_SEPARATE_EFS_SECTION
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endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP
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endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1),y)
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1),y)
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@ -1,9 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/psp_efs.h>
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#include <assert.h>
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#include <fmap_config.h>
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#include <soc/iomap.h>
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_Static_assert(FMAP_SECTION_EFS_START == (FLASH_BASE_ADDR + EFS_OFFSET),
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"FMAP EFS Offset does not match EFS Offset - check your config");
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