mb/google/zork: Fix Goodix touchscreen ACPI node

This change does the following:
a. USI_REPORT_EN is no longer set to high in coreboot. Instead
GPIO_144 is exposed as stop_gpio in ACPI to allow OS to control this
pad as required.
b. Appropriate delays are added for power-down sequencing:
 - Delay after REPORT_EN is disabled - 1ms
 - Delay after RESET is asserted - 1ms

BUG=b:159501288

Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: If4d12fa0d4f4e5123d8fdccdabda996dcafa4523
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2020-07-22 00:47:40 -07:00 committed by Felix Held
parent 2978502705
commit dcee4b6fa9
5 changed files with 12 additions and 7 deletions

View File

@ -158,11 +158,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
PAD_GPO(GPIO_142, HIGH), PAD_GPO(GPIO_142, HIGH),
/* BT_DISABLE */ /* BT_DISABLE */
PAD_GPO(GPIO_143, LOW), PAD_GPO(GPIO_143, LOW),
/* /* USI_REPORT_EN */
* USI_REPORT_EN - TODO: Driver resets this later. PAD_GPO(GPIO_144, LOW),
* Do we want it high or low initially?
*/
PAD_GPO(GPIO_144, HIGH),
}; };
const __weak const __weak

View File

@ -173,8 +173,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
/* UART1_TXD - FPMCU */ /* UART1_TXD - FPMCU */
PAD_NF(GPIO_143, UART1_TXD, PULL_NONE), PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
/* USI_REPORT_EN */ /* USI_REPORT_EN */
/* TODO: Driver resets this later. Do we want it high or low initially? */ PAD_GPO(GPIO_144, LOW),
PAD_GPO(GPIO_144, HIGH),
}; };
const __weak const __weak

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@ -82,6 +82,9 @@ chip soc/amd/picasso
register "generic.probed" = "1" register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_delay_ms" = "120" register "generic.reset_delay_ms" = "120"
register "generic.reset_off_delay_ms" = "1"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1" register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01" register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end device i2c 5d on end

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@ -67,6 +67,9 @@ chip soc/amd/picasso
register "generic.probed" = "1" register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_delay_ms" = "120" register "generic.reset_delay_ms" = "120"
register "generic.reset_off_delay_ms" = "1"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1" register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1" register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01" register "hid_desc_reg_offset" = "0x01"

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@ -89,7 +89,10 @@ chip soc/amd/picasso
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)"
register "generic.probed" = "1" register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)"
register "generic.reset_off_delay_ms" = "1"
register "generic.reset_delay_ms" = "120" register "generic.reset_delay_ms" = "120"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1" register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01" register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end device i2c 5d on end