mb/google/poppy/variants/nami: Split FP MCU Wake and IRQ GPIOS
We are seeing problems (interrupt storm) with using the same gpio for FP MCU wake and irq signals. Reverting back to using separate gpios for wake and irq until we resolve the issue. BUG=b:119447525, b:115706071 BRANCH=Nami TEST=Run powerd_dbus_suspend from kernel and make sure see DUT drop into S0ix in the EC console. Also, unlock from lock screen with fingerprint. Change-Id: Id7987f28526256808b8ed49e66f66298f7cdbcee Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/29665 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vincent Wang <vwang@google.com>
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@ -455,7 +455,7 @@ chip soc/intel/skylake
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register "hid" = "ACPI_DT_NAMESPACE_HID"
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register "uid" = "1"
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register "compat_string" = ""google,cros-ec-spi""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_D6_IRQ)"
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C8_IRQ)"
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register "wake" = "GPE0_DW1_06" # GPP_D6
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device spi 0 on end
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end # FPMCU
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@ -421,12 +421,14 @@ static const struct pad_config fpmcu_gpio_table[] = {
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PAD_CFG_NF(GPP_B22, NONE, DEEP, NF1),
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/* C3 : SML0CLK ==> TOUCHSCREEN_DIS# */
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PAD_CFG_GPO(GPP_C3, 0, DEEP),
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/* C8 : UART0_RXD ==> FPMCU_INT_L */
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PAD_CFG_GPI_APIC(GPP_C8, NONE, DEEP),
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/* C9 : UART0_TXD ==> FP_RST_ODL */
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PAD_CFG_GPO(GPP_C9, 1, DEEP),
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/* D5 : ISH_I2C0_SDA ==> FPMCU_BOOT0 */
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PAD_CFG_GPO(GPP_D5, 0, DEEP),
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/* D6 : ISH_I2C0_SCL ==> FPMCU_INT_L */
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PAD_CFG_GPI_IRQ_WAKE(GPP_D6, 20K_PU, DEEP, LEVEL, INVERT),
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PAD_CFG_GPI_ACPI_SCI(GPP_D6, 20K_PU, DEEP, INVERT),
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/* D17 : DMIC_CLK1 ==> NC */
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PAD_CFG_NC(GPP_D17),
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};
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