From dd9b1d1dd5e8418d1c86984b55bb9b535d5d8f64 Mon Sep 17 00:00:00 2001 From: Richard Spiegel Date: Thu, 20 Sep 2018 14:50:11 -0700 Subject: [PATCH] soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific STAPM programming was created inside function OemCustomizeInitEarly(). It should be SOC specific, and called by agesawrapper just before the call to OemCustomizeInitEarly(). BUG=b:116196626 TEST=build and boot grunt Change-Id: I8a2e51abda11a9d60a9057b38f2a484e1c8c9047 Signed-off-by: Richard Spiegel Reviewed-on: https://review.coreboot.org/28705 Reviewed-by: Martin Roth Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- .../kahlee/variants/baseboard/OemCustomize.c | 19 --------------- .../block/include/amdblocks/agesawrapper.h | 1 + src/soc/amd/common/block/pi/agesawrapper.c | 3 +++ src/soc/amd/stoneyridge/romstage.c | 23 +++++++++++++++++++ 4 files changed, 27 insertions(+), 19 deletions(-) diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c index 74578c27b2..cdc1fe0d70 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c +++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c @@ -149,27 +149,8 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = { /*---------------------------------------------------------------------------*/ VOID __weak OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly) { - const struct soc_amd_stoneyridge_config *cfg; - const struct device *dev = dev_find_slot(0, GNB_DEVFN); - struct _PLATFORM_CONFIGURATION *platform; - InitEarly->GnbConfig.PcieComplexList = (void *)&PcieComplex; InitEarly->GnbConfig.PsppPolicy = PsppBalanceLow; InitEarly->PlatformConfig.GnbAzI2sBusSelect = GnbAcpI2sBus; InitEarly->PlatformConfig.GnbAzI2sBusPinConfig = GnbAcp2Tx4RxBluetooth; - if (!dev || !dev->chip_info) { - printk(BIOS_WARNING, "Warning: Cannot find SoC devicetree" - " config, STAPM unchanged\n"); - return; - } - cfg = dev->chip_info; - platform = &InitEarly->PlatformConfig; - if ((cfg->stapm_percent) && (cfg->stapm_time) && (cfg->stapm_power)) { - platform->PlatStapmConfig.CfgStapmScalar = cfg->stapm_percent; - platform->PlatStapmConfig.CfgStapmTimeConstant = - cfg->stapm_time; - platform->PkgPwrLimitDC = cfg->stapm_power; - platform->PkgPwrLimitAC = cfg->stapm_power; - platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled; - } } diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h index 942936613e..713f76cc47 100644 --- a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h +++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h @@ -63,5 +63,6 @@ void SetNbEnvParams(GNB_ENV_CONFIGURATION *params); void SetFchMidParams(FCH_INTERFACE *params); void SetNbMidParams(GNB_MID_CONFIGURATION *params); void set_board_env_params(GNB_ENV_CONFIGURATION *params); +void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly); #endif /* __AGESAWRAPPER_H__ */ diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 5cd04ba24a..7ef2bdacaf 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -31,6 +31,8 @@ #include #include #include +#include +#include void __weak SetMemParams(AMD_POST_PARAMS *PostParams) {} void __weak OemPostParams(AMD_POST_PARAMS *PostParams) {} @@ -129,6 +131,7 @@ AGESA_STATUS agesawrapper_amdinitearly(void) AMD_EARLY_PARAMS *EarlyParams = create_struct(&AmdParamStruct); + soc_customize_init_early(EarlyParams); OemCustomizeInitEarly(EarlyParams); timestamp_add_now(TS_AGESA_INIT_EARLY_START); diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index de2219140c..a5acaf6f05 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -222,3 +222,26 @@ void SetMemParams(AMD_POST_PARAMS *PostParams) break; } } + +void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly) +{ + const struct soc_amd_stoneyridge_config *cfg; + const struct device *dev = dev_find_slot(0, GNB_DEVFN); + struct _PLATFORM_CONFIGURATION *platform; + + if (!dev || !dev->chip_info) { + printk(BIOS_WARNING, "Warning: Cannot find SoC devicetree" + " config, STAPM unchanged\n"); + return; + } + cfg = dev->chip_info; + platform = &InitEarly->PlatformConfig; + if ((cfg->stapm_percent) && (cfg->stapm_time) && (cfg->stapm_power)) { + platform->PlatStapmConfig.CfgStapmScalar = cfg->stapm_percent; + platform->PlatStapmConfig.CfgStapmTimeConstant = + cfg->stapm_time; + platform->PkgPwrLimitDC = cfg->stapm_power; + platform->PkgPwrLimitAC = cfg->stapm_power; + platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled; + } +}