diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 1c45470b9f..7e401ebb8e 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -113,6 +113,12 @@ struct soc_intel_skylake_config {
 	u32 TsegSize;
 	u16 MmioSize;
 
+	/*
+	 * DDR Frequency Limit
+	 * 0(Auto), 1067, 1333, 1600, 1867, 2133, 2400
+	 */
+	u16 DdrFreqLimit;
+
 	/* Probeless Trace function */
 	u8 ProbelessTrace;
 
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 5481004121..31f7fc29da 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -92,6 +92,7 @@ void soc_memory_init_params(struct romstage_params *params,
 	upd->EnableTraceHub = config->EnableTraceHub;
 	upd->SaGv = config->SaGv;
 	upd->RMT = config->Rmt;
+	upd->DdrFreqLimit = config->DdrFreqLimit;
 }
 
 void soc_display_memory_init_params(const MEMORY_INIT_UPD *old,