src/soc/intel/jasperlake: Update SD card ACPI device
1. Add _DSM method 2. Add support to turn on/off the power enable signal in _PS0/_PS3 methods. Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Change-Id: I4f944caa535bdc946eef1e0f518fe3ee344187b9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
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@ -71,6 +71,7 @@ Scope (\_SB.PCI0) {
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Name (_ADR, 0x00140005)
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Name (_DDN, "SD Controller")
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Name (TEMP, 0)
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Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))
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OperationRegion (SDPC, PCI_Config, 0x00, 0x100)
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Field (SDPC, WordAcc, NoLock, Preserve)
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@ -82,6 +83,65 @@ Scope (\_SB.PCI0) {
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PGEN, 1, /* PG_ENABLE */
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}
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/*
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* _DSM x86 Device Specific Method
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* Arg0: UUID Unique function identifier
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* Arg1: Integer Revision Level
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* Arg2: Integer Function Index (0 = Return Supported Functions)
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* Arg3: Package Parameters
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*/
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Method (_DSM, 4)
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{
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If (Arg0 == DSUU) {
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/* Check the revision */
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If (Arg1 >= 0) {
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/*
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* Function Index 0 the return value is a buffer containing
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* one bit for each function index, starting with zero.
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* Bit 0 - Indicates whether there is support for any
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* functions other than function 0.
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* Bit 1 - Indicates support to clear power control register
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* Bit 2 - Indicates support to set power control register
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* Bit 3 - Indicates support to set 1.8V signalling
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* Bit 4 - Indicates support to set 3.3V signalling
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* Bit 5 - Indicates support for HS200 mode
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* Bit 6 - Indicates support for HS400 mode
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* Bit 9 - Indicates eMMC I/O Driver Strength
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*/
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/*
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* For SD we have to support functions to
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* set 1.8V signalling and 3.3V signalling [BIT4, BIT3]
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*/
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If (Arg2 == 0) {
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Return (Buffer () { 0x19 })
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}
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/*
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* Function Index 3: Set 1.8v signalling.
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* We put a sleep of 100ms in this method to
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* work around a known issue with detecting
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* UHS SD card on PCH. This is to compensate
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* for the SD VR slowness.
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*/
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If (Arg2 == 3) {
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Sleep (100)
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Return(Buffer () { 0x00 })
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}
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/*
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* Function Index 4: Set 3.3v signalling.
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* We put a sleep of 100ms in this method to
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* work around a known issue with detecting
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* UHS SD card on PCH. This is to compensate
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* for the SD VR slowness.
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*/
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If (Arg2 == 4) {
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Sleep (100)
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Return(Buffer () { 0x00 })
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}
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}
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}
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Return(Buffer() { 0x0 })
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}
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Method(_INI)
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{
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/* Clear register 0x1C20/0x4820 */
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@ -98,6 +158,9 @@ Scope (\_SB.PCI0) {
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/* Set Power State to D0 */
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PMCR = PMCR & 0xFFFC
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TEMP = PMCR
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/* Change pad mode to Native */
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GPMO(SD_PWR_EN_PIN, 0x1)
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}
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Method (_PS3, 0, Serialized)
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@ -107,6 +170,15 @@ Scope (\_SB.PCI0) {
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/* Set Power State to D3 */
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PMCR = PMCR | 0x0003
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TEMP = PMCR
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/* Change pad mode to GPIO control */
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GPMO(SD_PWR_EN_PIN, 0x0)
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/* Enable Tx Buffer */
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GTXE(SD_PWR_EN_PIN, 0x1)
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/* Drive TX to zero */
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CTXS(SD_PWR_EN_PIN)
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}
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Device (CARD)
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@ -24,6 +24,7 @@
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#define GPIO_NUM_GROUPS 12
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#define GPIO_MAX_NUM_PER_GROUP 24
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#define SD_PWR_EN_PIN GPP_H1
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/*
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* GPIOs are ordered monotonically increasing to match ACPI/OS driver.
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