cpu/*/car: fix ancient URL explaining XIP range run-time calculation

Change-Id: I49526b6aafb516a668b7b5e983a0372e3d26a8fc
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/28216
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/cpu/amd/car/cache_as_ram.inc

@@ -378,7 +378,7 @@ fam15_skip_dram_mtrr_setup:
 	xorl	%edx, %edx
 	/*
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+	 * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
 	 */
 	movl	$_program, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax

src/cpu/intel/car/core2/cache_as_ram.S

@@ -148,7 +148,7 @@ addrsize_set_high:
 	xorl	%edx, %edx
 	/*
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+	 * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
 	 */
 	movl	$_program, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax

src/cpu/intel/car/p3/cache_as_ram.S

@@ -137,7 +137,7 @@ addrsize_set_high:
 	xorl	%edx, %edx
 	/*
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+	 * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
 	 */
 	movl	$_program, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax

src/cpu/intel/car/p4-netburst/cache_as_ram.S

@@ -332,7 +332,7 @@ no_msr_11e:
 	xorl	%edx, %edx
 	/*
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+	 * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
 	 */
 	movl	$_program, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax

src/cpu/via/car/cache_as_ram.inc

@@ -114,7 +114,7 @@ clear_fixed_var_mtrr_out:
 	xorl	%edx, %edx
 	/*
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+	 * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
 	 */
 	movl	$_program, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
@@ -205,7 +205,7 @@ clear_fixed_var_mtrr_out:
 	xorl	%edx, %edx
 	/*
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+	 * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
 	 */
 	movl	$_program, %eax
 	andl	$(~(CONFIG_XIP_ROM_SIZE - 1)), %eax

src/soc/intel/broadwell/romstage/cache_as_ram.inc

@@ -134,7 +134,7 @@ clear_mtrrs:
 	xorl	%edx, %edx
 	/*
 	 * IMPORTANT: The following calculation _must_ be done at runtime. See
-	 * https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
+	 * https://mail.coreboot.org/pipermail/coreboot/2010-October/060922.html
 	 */
 	movl    $_program, %eax
 	andl    $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax