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soc/intel/skylake: Update GFX devtree options

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This patch includes the following changes:

 1. Sets FSP options in romstage_fsp20.c to select primary GPU.
    List of options:
      - InternalGfx,
      - PrimaryDisplay.

 2. iGPU will be initialized if the corresponding PCI device is defined
    in the device tree as:

      device pci 02.0 on end

    In this case, it is not necessary to set the InternalGfx option to
    enable this device

 3. Primary_iGFX is used as the default value for all skl/kbl boards
    (since the PrimaryDisplay option isn`t defined in the devicetree.cb)

Change-Id: Ie3f9362676105e41c69139a094dbb9e8b865689f
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32044
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Maxim Polyakov 2019-03-21 18:50:42 +03:00 committed by Nico Huber
parent 407a279461
commit de08ae1080
2 changed files with 32 additions and 1 deletions
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8
src/soc/intel/skylake/chip.h
View file

@ -311,7 +311,13 @@ struct soc_intel_skylake_config {
/* Gfx related */
u8 IgdDvmt50PreAlloc;
u8 PrimaryDisplay;
enum {
Display_iGFX,
Display_PEG,
Display_PCH_PCIe,
Display_Auto,
Display_Switchable,
} PrimaryDisplay;
u8 InternalGfx;
u8 ApertureSize;
u8 SkipExtGfxScan;

25
src/soc/intel/skylake/romstage/romstage_fsp20.c
View file

@ -243,6 +243,28 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
}
}
static void soc_primary_gfx_config_params(FSP_M_CONFIG *m_cfg,
const struct soc_intel_skylake_config *config)
{
const struct device *dev;
dev = dev_find_slot(0, SA_DEVFN_IGD);
if (!dev || !dev->enabled) {
/*
* If iGPU is disabled or not defined in the devicetree.cb,
* the FSP does not initialize this device
*/
m_cfg->InternalGfx = 0;
if (config->PrimaryDisplay == Display_iGFX)
m_cfg->PrimaryDisplay = Display_Auto;
else
m_cfg->PrimaryDisplay = config->PrimaryDisplay;
} else {
m_cfg->InternalGfx = 1;
m_cfg->PrimaryDisplay = config->PrimaryDisplay;
}
}
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
{
const struct device *dev;
@ -274,6 +296,9 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
/* Enable SMBus controller based on config */
m_cfg->SmbusEnable = config->SmbusEnable;
/* Set primary graphic device */
soc_primary_gfx_config_params(m_cfg, config);
mainboard_memory_init_params(mupd);
}