CBMEM: Always have early initialisation

Assume EARLY_CBMEM_INIT=y everywhere and remove option from Kconfig.

If romstage does not make the cbmem_initialize() call, features like
COLLECT_TIMESTAMPS and early CBMEM_CONSOLE will execute during
romstage, but that data will get lost as no CAR migration is
executed.

Change-Id: I5615645ed0f5fd78fbc372cf5c3da71a3134dd85
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3917
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Kyösti Mälkki 2013-09-08 10:08:28 +03:00
parent a2f6af3330
commit de1fe7f655
18 changed files with 2 additions and 39 deletions

View File

@ -170,15 +170,6 @@ config INCLUDE_CONFIG_FILE
config 0x8d740 raw 3324
(empty) 0x8e480 null 3610440
config EARLY_CBMEM_INIT
bool
default n
help
Make coreboot initialize the CBMEM structures while running in ROM
stage. This is useful when the ROM stage wants to communicate
some, for instance, execution timestamps. It needs support in
romstage.c and should be enabled by the board's Kconfig.
config DYNAMIC_CBMEM
bool "The CBMEM space is dynamically grown."
default n
@ -189,7 +180,7 @@ config DYNAMIC_CBMEM
config COLLECT_TIMESTAMPS
bool "Create a table of timestamps collected during boot"
depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM)
default n
help
Make coreboot create a table of timer-ID/timer-value pairs to
allow measuring time spent at different phases of the boot process.

View File

@ -274,7 +274,6 @@ config CONSOLE_NE2K_IO_PORT
boundary, qemu needs broader align)
config CONSOLE_CBMEM
depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM)
bool "Send console output to a CBMEM buffer"
default n
help

View File

@ -56,10 +56,6 @@ romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
romstage-$(CONFIG_USBDEBUG) += usbdebug.c
endif
ifneq ($(CONFIG_DYNAMIC_CBMEM),y)
romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c
endif
romstage-y += compute_ip_checksum.c
ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y)
romstage-y += memmove.c
@ -112,7 +108,7 @@ ramstage-y += dynamic_cbmem.c
romstage-y += dynamic_cbmem.c
else
ramstage-y += cbmem.c
romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c
romstage-$(CONFIG_CACHE_AS_RAM) += cbmem.c
endif # CONFIG_DYNAMIC_CBMEM
ramstage-y += cbmem_info.c

View File

@ -95,7 +95,6 @@ void cbmem_late_set_table(uint64_t base, uint64_t size)
* - suspend/resume backup memory
*/
#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)
static void cbmem_init(void)
{
uint64_t baseaddr, size;
@ -120,7 +119,6 @@ static void cbmem_init(void)
.size = size - CBMEM_TOC_RESERVED
};
}
#endif
int cbmem_reinit(void)
{
@ -220,7 +218,6 @@ void *cbmem_find(u32 id)
return (void *)NULL;
}
#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)
/* Returns True if it was not initialized before. */
int cbmem_initialize(void)
{
@ -244,7 +241,6 @@ int cbmem_initialize(void)
return rv;
}
#endif
#ifndef __PRE_RAM__
static void init_cbmem_post_device(void *unused)

View File

@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_256
select EARLY_CBMEM_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT
config MAINBOARD_DIR

View File

@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_TABLES
# select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_256
select EARLY_CBMEM_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT
config MAINBOARD_DIR

View File

@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_SMI_HANDLER
select GFXUMA
select CHROMEOS
select EARLY_CBMEM_INIT
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE

View File

@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CHROMEOS
select SERIRQ_CONTINUOUS_MODE
select MAINBOARD_HAS_NATIVE_VGA_INIT
select EARLY_CBMEM_INIT
select MARK_GRAPHICS_MEM_WRCOMB
config MAINBOARD_DIR

View File

@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_SMI_HANDLER
select GFXUMA
select CHROMEOS
select EARLY_CBMEM_INIT
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE

View File

@ -296,11 +296,7 @@ void main(unsigned long bist)
post_code(0x3e);
MCHBAR16(SSKPD) = 0xCAFE;
#if CONFIG_EARLY_CBMEM_INIT
cbmem_was_initted = !cbmem_initialize();
#else
cbmem_was_initted = cbmem_reinit();
#endif
#if CONFIG_HAVE_ACPI_RESUME
/* If there is no high memory area, we didn't boot before, so

View File

@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_RESUME
select GFXUMA
#select CHROMEOS
select EARLY_CBMEM_INIT
config MAINBOARD_DIR
string

View File

@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_RESUME
select HAVE_SMI_HANDLER
select GFXUMA
select EARLY_CBMEM_INIT
select ENABLE_VMX
select HAVE_MRC

View File

@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CHANNEL_XOR_RANDOMIZATION
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select EARLY_CBMEM_INIT
config MAINBOARD_DIR
string
default lenovo/t60

View File

@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_RESUME
select USE_OPTION_TABLE
select MAINBOARD_HAS_NATIVE_VGA_INIT
select EARLY_CBMEM_INIT
config MAINBOARD_DIR
string

View File

@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_BD82X6X
select SUPERIO_SMSC_MEC1308
select DRIVERS_GENERIC_IOAPIC
select EARLY_CBMEM_INIT
select HAVE_MRC
config MAINBOARD_DIR

View File

@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select SOUTHBRIDGE_INTEL_BD82X6X
select SUPERIO_ITE_IT8772F
select EARLY_CBMEM_INIT
select HAVE_MRC
config MAINBOARD_DIR

View File

@ -94,9 +94,7 @@ void main(unsigned long bist)
print_debug("We passed RAM verify\n");
/* We got RAM working, now we can write the timestamps to RAM */
#if CONFIG_EARLY_CBMEM_INIT
cbmem_initialize();
#endif
timestamp_sync();
timestamp_add_now(TS_END_ROMSTAGE);
/* FIXME: See if this is needed or take this out please */

View File

@ -58,7 +58,6 @@ static void save_mrc_data(struct pei_data *pei_data)
{
u16 c1, c2, checksum;
#if CONFIG_EARLY_CBMEM_INIT
struct mrc_data_container *mrcdata;
int output_len = ALIGN(pei_data->mrc_output_len, 16);
@ -84,7 +83,6 @@ static void save_mrc_data(struct pei_data *pei_data)
mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data,
mrcdata->mrc_data_size);
#endif
/* Save the MRC seed values to CMOS */
cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);