mb/google/volteer: Create drobit variant
Create the drobit variant of the volteer reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.2.0). BUG=b:171947885 BRANCH=none TEST=emerge-volteer coreboot Signed-off-by: Frank Chu <frank_chu@pegatron.corp-partner.google.com> Change-Id: I63b7312bba236bd5af028359804d042f6850d8ba Reviewed-on: https://review.coreboot.org/c/coreboot/+/47787 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -106,6 +106,7 @@ config MAINBOARD_PART_NUMBER
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default "Boldar" if BOARD_GOOGLE_BOLDAR
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default "Elemi" if BOARD_GOOGLE_ELEMI
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default "Voema" if BOARD_GOOGLE_VOEMA
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default "Drobit" if BOARD_GOOGLE_DROBIT
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config MAX_CPUS
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int
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@ -146,6 +147,7 @@ config VARIANT_DIR
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default "boldar" if BOARD_GOOGLE_BOLDAR
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default "elemi" if BOARD_GOOGLE_ELEMI
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default "voema" if BOARD_GOOGLE_VOEMA
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default "drobit" if BOARD_GOOGLE_DROBIT
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config VARIANT_HAS_MIPI_CAMERA
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bool
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@ -89,3 +89,7 @@ config BOARD_GOOGLE_VOEMA
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bool "-> Voema"
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select BOARD_GOOGLE_BASEBOARD_VOLTEER
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select SOC_INTEL_CSE_LITE_SKU
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config BOARD_GOOGLE_DROBIT
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bool "-> Drobit"
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select BOARD_GOOGLE_BASEBOARD_VOLTEER
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@ -0,0 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef __VARIANT_EC_H__
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#define __VARIANT_EC_H__
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#include <baseboard/ec.h>
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#endif
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@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef VARIANT_GPIO_H
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#define VARIANT_GPIO_H
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#include <baseboard/gpio.h>
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/* Memory configuration board straps */
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/* Copied from baseboard and may need to change for the new variant. */
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#define GPIO_MEM_CONFIG_0 GPP_C12
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#define GPIO_MEM_CONFIG_1 GPP_C15
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#define GPIO_MEM_CONFIG_2 GPP_C14
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#define GPIO_MEM_CONFIG_3 GPP_D15
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#endif
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@ -0,0 +1,5 @@
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## SPDX-License-Identifier: GPL-2.0-or-later
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## This is an auto-generated file. Do not edit!!
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## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
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SPD_SOURCES = placeholder.spd.hex
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@ -0,0 +1 @@
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DRAM Part Name ID to assign
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@ -0,0 +1,4 @@
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# This is a CSV file containing a list of memory parts used by this variant.
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# Generate an updated Makefile.inc and dram_id.generated.txt by running the
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# gen_part_id tool from util/spd_tools/ddr4 or util/spd_tools/lp4x
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# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.
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@ -0,0 +1,6 @@
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chip soc/intel/tigerlake
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device domain 0 on
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end
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end
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