diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 0e502e717f..83f6778f49 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -64,6 +64,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u8 byte;
 	pci_devfn_t dev;
 
+	amd_initmmio();
+
 #if IS_ENABLED(CONFIG_POST_DEVICE_PCI_PCIE)
 	hudson_pci_port80();
 #endif
@@ -71,8 +73,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	hudson_lpc_port80();
 #endif
 
-	amd_initmmio();
-
 	if (!cpu_init_detectedx && boot_cpu()) {
 
 		/* enable SIO LPC decode */
diff --git a/src/mainboard/msi/ms7721/romstage.c b/src/mainboard/msi/ms7721/romstage.c
index 599187d4c0..f8565adec6 100644
--- a/src/mainboard/msi/ms7721/romstage.c
+++ b/src/mainboard/msi/ms7721/romstage.c
@@ -128,6 +128,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u8 byte;
 	pci_devfn_t dev;
 
+	amd_initmmio();
+
 #if IS_ENABLED(CONFIG_POST_DEVICE_PCI_PCIE)
 	hudson_pci_port80();
 #endif
@@ -135,8 +137,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	hudson_lpc_port80();
 #endif
 
-	amd_initmmio();
-
 	if (!cpu_init_detectedx && boot_cpu()) {
 
 		/* enable SIO LPC decode */