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nb/amd/amdmct/mct_ddr3: Replace MTRR addresses with macros 

Change-Id: I6d161e9e44ebd284e229ea38b6e23d571aa7bf1e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2018-11-07 07:53:38 +01:00 committed by Patrick Georgi
parent a9473ecbb1
commit de462804e1
1 changed files with 5 additions and 4 deletions
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9
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
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@ -39,6 +39,7 @@
#include <southbridge/amd/common/reset.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
#include <cpu/x86/mtrr.h>
#include <arch/acpi.h>
#include <string.h>
#include <device/dram/ddr3.h>
@ -3577,10 +3578,10 @@ retry_dqs_training_and_levelization:
mctHookBeforeAnyTraining(pMCTstat, pDCTstatA);
if (!is_fam15h()) {
/* TODO: should be in mctHookBeforeAnyTraining */
_WRMSR(0x26C, 0x04040404, 0x04040404);
_WRMSR(0x26D, 0x04040404, 0x04040404);
_WRMSR(0x26E, 0x04040404, 0x04040404);
_WRMSR(0x26F, 0x04040404, 0x04040404);
_WRMSR(MTRR_FIX_4K_E0000, 0x04040404, 0x04040404);
_WRMSR(MTRR_FIX_4K_E8000, 0x04040404, 0x04040404);
_WRMSR(MTRR_FIX_4K_F0000, 0x04040404, 0x04040404);
_WRMSR(MTRR_FIX_4K_F8000, 0x04040404, 0x04040404);
}
if (nv_DQSTrainCTL) {