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mb/google/glados: Drop TPM PIRQ 

The Infineon TPM 1.2 used on glados boards doesn't use a PIRQ;
Linux only works with 'tpm.tis_interrupts=0" and Windows fails to
init the TPM citing a lack of available resources. With the PIRQ
removed, both Linux and Windows are happy / the TPM is available
for use.

Test: build/boot Linux 5.16.x and Windows 11 on google/chell

Change-Id: I544695505291bbebe062df636cc8ddd139c08c2b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62444
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Matt DeVillier 2022-02-23 18:39:39 -06:00 committed by Felix Held
parent 2d5642c70d
commit de5d8ba559
8 changed files with 7 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/glados/Kconfig
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@ -113,10 +113,6 @@ config VARIANT_DIR
config OVERRIDE_DEVICETREE config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
config TPM_PIRQ
hex
default 0x18 # GPP_E0_IRQ
config INCLUDE_NHLT_BLOBS config INCLUDE_NHLT_BLOBS
bool "Include blobs for audio." bool "Include blobs for audio."
select NHLT_DMIC_2CH select NHLT_DMIC_2CH

2
src/mainboard/google/glados/variants/asuka/include/variant/gpio.h
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@ -143,7 +143,7 @@ static const struct pad_config gpio_table[] = {
/* ITCH_SPI_D2 */ PAD_NC(GPP_D21, NONE), /* ITCH_SPI_D2 */ PAD_NC(GPP_D21, NONE),
/* ITCH_SPI_D3 */ PAD_NC(GPP_D22, NONE), /* ITCH_SPI_D3 */ PAD_NC(GPP_D22, NONE),
/* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* SPI_TPM_IRQ */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, PLTRST), /* SPI_TPM_IRQ */ PAD_NC(GPP_E0, NONE),
/* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE), /* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE),
/* SSD_PEDET */ PAD_NC(GPP_E2, NONE), /* SSD_PEDET */ PAD_NC(GPP_E2, NONE),
/* AUDIO_DB_ID */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E3, NONE, DEEP), /* AUDIO_DB_ID */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E3, NONE, DEEP),

2
src/mainboard/google/glados/variants/caroline/include/variant/gpio.h
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@ -152,7 +152,7 @@ static const struct pad_config gpio_table[] = {
/* TS_SPI1_IO2 */ PAD_NC(GPP_D21, NONE), /* TS_SPI1_IO2 */ PAD_NC(GPP_D21, NONE),
/* TS_SPI1_IO3 */ PAD_CFG_GPO(GPP_D22, 1, DEEP), /* I2S2 BUFFER */ /* TS_SPI1_IO3 */ PAD_CFG_GPO(GPP_D22, 1, DEEP), /* I2S2 BUFFER */
/* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* SATAXPCI0 */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, PLTRST), /* TPM_PIRQ_L */ /* SPI_TPM_IRQ */ PAD_NC(GPP_E0, NONE),
/* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE), /* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE),
/* SATAXPCIE2 */ PAD_NC(GPP_E2, NONE), /* SATAXPCIE2 */ PAD_NC(GPP_E2, NONE),
/* CPU_GP0 */ PAD_NC(GPP_E3, NONE), /* CPU_GP0 */ PAD_NC(GPP_E3, NONE),

2
src/mainboard/google/glados/variants/cave/include/variant/gpio.h
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@ -148,7 +148,7 @@ static const struct pad_config gpio_table[] = {
/* TS_SPI_IO2 */ PAD_NC(GPP_D21, NONE), /* TS_SPI_IO2 */ PAD_NC(GPP_D21, NONE),
/* TS_SPI_IO3 */ PAD_NC(GPP_D22, NONE), /* TS_SPI_IO3 */ PAD_NC(GPP_D22, NONE),
/* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* SATAXPCI0 */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, PLTRST), /* TPM_PIRQ_L */ /* SPI_TPM_IRQ */ PAD_NC(GPP_E0, NONE),
/* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE), /* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE),
/* SATAXPCIE2 */ PAD_NC(GPP_E2, NONE), /* SATAXPCIE2 */ PAD_NC(GPP_E2, NONE),
/* CPU_GP0 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E3, NONE, DEEP), /* AUDIO_DB_ID */ /* CPU_GP0 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E3, NONE, DEEP), /* AUDIO_DB_ID */

2
src/mainboard/google/glados/variants/chell/include/variant/gpio.h
View File

@ -142,7 +142,7 @@ static const struct pad_config gpio_table[] = {
/* SPI1_IO2 */ PAD_CFG_GPO(GPP_D21, 0, DEEP), /* SPI1_IO2 */ PAD_CFG_GPO(GPP_D21, 0, DEEP),
/* SPI1_IO3 */ PAD_CFG_GPO(GPP_D22, 0, DEEP), /* I2S2 BUFFER */ /* SPI1_IO3 */ PAD_CFG_GPO(GPP_D22, 0, DEEP), /* I2S2 BUFFER */
/* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* SATAXPCI0 */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, PLTRST), /* TPM_PIRQ_L */ /* SPI_TPM_IRQ */ PAD_NC(GPP_E0, NONE),
/* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE), /* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE),
/* SATAXPCIE2 */ PAD_NC(GPP_E2, NONE), /* SATAXPCIE2 */ PAD_NC(GPP_E2, NONE),
/* CPU_GP0 */ PAD_CFG_GPO(GPP_E3, 1, DEEP), /* TOUCHSCREEN_RST_L */ /* CPU_GP0 */ PAD_CFG_GPO(GPP_E3, 1, DEEP), /* TOUCHSCREEN_RST_L */

2
src/mainboard/google/glados/variants/glados/include/variant/gpio.h
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@ -145,7 +145,7 @@ static const struct pad_config gpio_table[] = {
/* GPP_D21 */ /* GPP_D21 */
/* GPP_D22 */ /* GPP_D22 */
/* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* SATAXPCI0 */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, DEEP), /* TPM_PIRQ_L */ /* SPI_TPM_IRQ */ PAD_NC(GPP_E0, NONE),
/* SATAXPCIE1 */ /* GPP_E1 */ /* SATAXPCIE1 */ /* GPP_E1 */
/* SATAXPCIE2 */ /* GPP_E2 */ /* SATAXPCIE2 */ /* GPP_E2 */
/* CPU_GP0 */ /* GPP_E3 */ /* CPU_GP0 */ /* GPP_E3 */

2
src/mainboard/google/glados/variants/lars/include/variant/gpio.h
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@ -138,7 +138,7 @@ static const struct pad_config gpio_table[] = {
/* ITCH_SPI_D2 */ PAD_NC(GPP_D21, NONE), /* ITCH_SPI_D2 */ PAD_NC(GPP_D21, NONE),
/* ITCH_SPI_D3 */ PAD_NC(GPP_D22, NONE), /* ITCH_SPI_D3 */ PAD_NC(GPP_D22, NONE),
/* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* SPI_TPM_IRQ */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, PLTRST), /* SPI_TPM_IRQ */ PAD_NC(GPP_E0, NONE),
/* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE), /* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE),
/* SSD_PEDET */ PAD_NC(GPP_E2, NONE), /* SSD_PEDET */ PAD_NC(GPP_E2, NONE),
/* CPU_GP0 */ PAD_NC(GPP_E3, NONE), /* CPU_GP0 */ PAD_NC(GPP_E3, NONE),

2
src/mainboard/google/glados/variants/sentry/include/variant/gpio.h
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@ -146,7 +146,7 @@ static const struct pad_config gpio_table[] = {
/* ITCH_SPI_D2 */ PAD_NC(GPP_D21, NONE), /* ITCH_SPI_D2 */ PAD_NC(GPP_D21, NONE),
/* ITCH_SPI_D3 */ PAD_NC(GPP_D22, NONE), /* ITCH_SPI_D3 */ PAD_NC(GPP_D22, NONE),
/* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1), /* I2S_MCLK */ PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* SPI_TPM_IRQ */ PAD_CFG_GPI_APIC_HIGH(GPP_E0, NONE, PLTRST), /* SPI_TPM_IRQ */ PAD_NC(GPP_E0, NONE),
/* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE), /* SATAXPCIE1 */ PAD_NC(GPP_E1, NONE),
/* SSD_PEDET */ PAD_NC(GPP_E2, NONE), /* SSD_PEDET */ PAD_NC(GPP_E2, NONE),
/* AUDIO_DB_ID */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E3, NONE, DEEP), /* AUDIO_DB_ID */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E3, NONE, DEEP),