bootblock: Provide some common prototypes

The split of bootblock initialisation to cpu, northbridge and
southbridge is not specific to intel at all, create new header
<arch/bootblock.h> as AMD will want some of these too.

Change-Id: I702cc6bad4afee4f61acf58b9155608b28eb417e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/arch/x86/include/arch/bootblock.h

@@ -11,8 +11,8 @@
  * GNU General Public License for more details.
  */
 
-#ifndef _CPU_INTEL_CAR_BOOTBLOCK_H
+#ifndef __ARCH_BOOTBLOCK_H__
-#define _CPU_INTEL_CAR_BOOTBLOCK_H
+#define __ARCH_BOOTBLOCK_H__
 
 void bootblock_early_cpu_init(void);
 void bootblock_early_northbridge_init(void);

src/cpu/intel/car/bootblock.c

@@ -12,7 +12,7 @@
  */
 
 #include <bootblock_common.h>
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <cpu/x86/bist.h>
 
 static uint32_t saved_bist;

src/cpu/intel/haswell/bootblock.c

@@ -13,6 +13,7 @@
 
 #include <stdint.h>
 #include <arch/cpu.h>
+#include <arch/bootblock.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/io.h>
@@ -21,7 +22,6 @@
 #include "haswell.h"
 
 #include <southbridge/intel/lynxpoint/pch.h>
-#include <cpu/intel/car/bootblock.h>
 
 static void set_flex_ratio_to_tdp_nominal(void)
 {

src/cpu/intel/model_206ax/bootblock.c

@@ -12,11 +12,11 @@
  */
 
 #include <stdint.h>
+#include <arch/bootblock.h>
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <arch/io.h>
 #include <halt.h>
-#include <cpu/intel/car/bootblock.h>
 
 #include "model_206ax.h"
 

src/northbridge/intel/gm45/bootblock.c

@@ -11,7 +11,7 @@
  * GNU General Public License for more details.
  */
 
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 
 /* Just re-define these instead of including gm45.h. It blows up romcc. */

src/northbridge/intel/haswell/bootblock.c

@@ -11,8 +11,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "haswell.h"
 
 void bootblock_early_northbridge_init(void)

src/northbridge/intel/i945/bootblock.c

@@ -11,7 +11,7 @@
  * GNU General Public License for more details.
  */
 
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include "i945.h"
 

src/northbridge/intel/nehalem/bootblock.c

@@ -11,8 +11,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 
 void bootblock_early_northbridge_init(void)
 {

src/northbridge/intel/pineview/bootblock.c

@@ -11,8 +11,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "pineview.h"
 
 #define MMCONF_256_BUSSES 16

src/northbridge/intel/sandybridge/bootblock.c

@@ -11,8 +11,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "sandybridge.h"
 
 void bootblock_early_northbridge_init(void)

src/northbridge/intel/x4x/bootblock.c

@@ -14,8 +14,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "x4x.h"
 #include "iomap.h"
 

src/soc/intel/baytrail/bootblock/bootblock.c

@@ -13,7 +13,7 @@
  * GNU General Public License for more details.
  */
 
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include <soc/iosf.h>
 #include <soc/iomap.h>

src/soc/intel/broadwell/bootblock/cpu.c

@@ -14,15 +14,15 @@
  */
 
 #include <stdint.h>
+#include <arch/bootblock.h>
+#include <arch/io.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
-#include <arch/io.h>
 #include <halt.h>
 #include <soc/rcba.h>
 #include <soc/msr.h>
 #include <delay.h>
-#include <cpu/intel/car/bootblock.h>
 
 static void set_flex_ratio_to_tdp_nominal(void)
 {

src/soc/intel/broadwell/bootblock/pch.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>
@@ -22,7 +23,6 @@
 #include <reg_script.h>
 #include <soc/pm.h>
 #include <soc/romstage.h>
-#include <cpu/intel/car/bootblock.h>
 
 /*
  * Enable Prefetching and Caching.

src/soc/intel/broadwell/bootblock/systemagent.c

@@ -13,10 +13,10 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/systemagent.h>
-#include <cpu/intel/car/bootblock.h>
 
 void bootblock_early_northbridge_init(void)
 {

src/southbridge/intel/bd82x6x/bootblock.c

@@ -13,7 +13,7 @@
  * GNU General Public License for more details.
  */
 
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include "pch.h"
 

src/southbridge/intel/i82371eb/bootblock.c

@@ -15,10 +15,10 @@
  */
 
 #include <stdint.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <device/pci_type.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82371eb.h"
 
 #define PCI_ID(VENDOR_ID, DEVICE_ID) \

src/southbridge/intel/i82801dx/bootblock.c

@@ -11,7 +11,7 @@
  * GNU General Public License for more details.
  */
 
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 
 void bootblock_early_southbridge_init(void)

src/southbridge/intel/i82801gx/bootblock.c

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82801gx.h"
 
 static void enable_spi_prefetch(void)

src/southbridge/intel/i82801ix/bootblock.c

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82801ix.h"
 
 

src/southbridge/intel/i82801jx/bootblock.c

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82801jx.h"
 
 static void enable_spi_prefetch(void)

src/southbridge/intel/ibexpeak/bootblock.c

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "pch.h"
 #include "chip.h"
 

src/southbridge/intel/lynxpoint/bootblock.c

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "pch.h"
 
 /*