purism/librem13v2: Update PCI config
Update devicetree PCI config based on board spec: - enable PCIe Root Ports 5 and 9 (wifi and nvme respectively) - enable PCIe CLKREQ on RP9, disable on RP5 - enable USB OTG - enable P2SB Note: PCIe RP5 is on 0.1c.0 despite this being labeled as RP1 Change-Id: Ia71ed25bd41668df1ee3e4b4e28f54482722452c Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/19939 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -147,12 +147,13 @@ chip soc/intel/skylake
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.voltage_limit = 1520,
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}"
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# Enable Root port 1.
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register "PcieRpEnable[0]" = "1"
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# Enable CLKREQ#
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register "PcieRpClkReqSupport[0]" = "1"
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# RP 1 uses SRCCLKREQ1#
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register "PcieRpClkReqNumber[0]" = "1"
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# Enable Root Ports 5 and 9
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register "PcieRpEnable[4]" = "1"
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register "PcieRpEnable[8]" = "1"
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# Enable CLKREQ# for RP9
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register "PcieRpClkReqSupport[8]" = "1"
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# ClkReq for NVMe - Bruteforced (no other value works)
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register "PcieRpClkReqNumber[8]" = "2"
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register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1
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register "usb2_ports[1]" = "USB2_PORT_LONG(OC3)" # Type-C Port 2
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@ -198,7 +199,7 @@ chip soc/intel/skylake
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device pci 00.0 on end # Host Bridge
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device pci 02.0 on end # Integrated Graphics Device
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device pci 14.0 on end # USB xHCI
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device pci 14.1 off end # USB xDCI (OTG)
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device pci 14.1 on end # USB xDCI (OTG)
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device pci 14.2 on end # Thermal Subsystem
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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@ -206,12 +207,7 @@ chip soc/intel/skylake
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device pci 16.3 off end # Management Engine KT Redirection
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device pci 16.4 off end # Management Engine Interface 3
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device pci 17.0 on end # SATA
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device pci 1c.0 on
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chip drivers/intel/wifi
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register "wake" = "GPE0_DW0_16"
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device pci 00.0 on end
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end
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end # PCI Express Port 1
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device pci 1c.0 on end # PCI Express Port 1
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device pci 1c.1 off end # PCI Express Port 2
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device pci 1c.2 off end # PCI Express Port 3
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device pci 1c.3 off end # PCI Express Port 4
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@ -219,7 +215,7 @@ chip soc/intel/skylake
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device pci 1c.5 off end # PCI Express Port 6
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device pci 1c.6 off end # PCI Express Port 7
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device pci 1c.7 off end # PCI Express Port 8
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device pci 1d.0 off end # PCI Express Port 9
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device pci 1d.0 on end # PCI Express Port 9
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device pci 1d.1 off end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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@ -228,7 +224,7 @@ chip soc/intel/skylake
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device pnp 0c09.0 on end
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end
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end # LPC Interface
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device pci 1f.1 off end # P2SB
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device pci 1f.1 on end # P2SB
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device pci 1f.2 on end # Power Management Controller
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device pci 1f.3 on end # Intel HDA
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device pci 1f.4 on end # SMBus
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