Add some more CONFIG_* prefixes that were missing.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4497 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -273,7 +273,7 @@ static void i82801gx_power_options(device_t dev)
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/* Set up power management block and determine sleep mode */
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pmbase = pci_read_config16(dev, 0x40) & 0xfffe;
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reg32 = inl(pmbase + 0x04); // PM1_CNT
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#if HAVE_ACPI_RESUME
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#if CONFIG_HAVE_ACPI_RESUME
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acpi_slp_type = (((reg32 >> 10) & 7) == 5) ? 3 : 0;
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printk_debug("PM1_CNT: 0x%08x --> acpi_sleep_type: %x\n",
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reg32, acpi_slp_type);
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@ -23,7 +23,7 @@
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#define MAINBOARD_POWER_ON 1
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#define MAINBOARD_POWER_KEEP 2
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#ifndef MAINBOARD_POWER_ON_AFTER_FAIL
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#define MAINBOARD_POWER_ON_AFTER_FAIL MAINBOARD_POWER_ON
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#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
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#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
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#endif
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@ -300,7 +300,7 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
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* CMOS or even better from GNVS. Right now it's hard
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* coded at compile time.
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*/
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u8 s5pwr = MAINBOARD_POWER_ON_AFTER_FAIL;
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u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
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/* First, disable further SMIs */
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reg8 = inb(pmbase + SMI_EN);
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