northbridge/amd/agesa/family15rl: Remove commented code
Change-Id: I5f45a4cd5661140f57aa37e86cc8a34622da3de5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16887 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
parent
d13b147235
commit
decf90e4eb
1 changed files with 0 additions and 11 deletions
|
@ -83,17 +83,6 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg,
|
||||||
for (i = 0; i < node_nums; i++)
|
for (i = 0; i < node_nums; i++)
|
||||||
pci_write_config32(__f1_dev[i], reg+4, tempreg);
|
pci_write_config32(__f1_dev[i], reg+4, tempreg);
|
||||||
tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ?
|
tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ?
|
||||||
#if 0
|
|
||||||
// FIXME: can we use VGA reg instead?
|
|
||||||
if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
|
|
||||||
printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %s\n",
|
|
||||||
__func__, dev_path(dev), link);
|
|
||||||
tempreg |= PCI_IO_BASE_VGA_EN;
|
|
||||||
}
|
|
||||||
if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) {
|
|
||||||
tempreg |= PCI_IO_BASE_NO_ISA;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
for (i = 0; i < node_nums; i++)
|
for (i = 0; i < node_nums; i++)
|
||||||
pci_write_config32(__f1_dev[i], reg, tempreg);
|
pci_write_config32(__f1_dev[i], reg, tempreg);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue