Crude fixup of config files currently non parsable by buildtarget.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jonathan McDowell
parent
e251c42197
commit
ded1368b1a
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@ -32,6 +32,9 @@ uses CROSS_COMPILE
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uses CC
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uses HOSTCC
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uses OBJCOPY
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses CONFIG_COMPRESS
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## ROM_SIZE is the size of boot ROM that this board will use.
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default ROM_SIZE = 256*1024
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@ -2,86 +2,18 @@
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# the Iwill DK8S2
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# This will make a target directory of ./dk8s2
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loadoptions
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target dk8s2
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uses ARCH
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uses CONFIG_COMPRESS
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uses CONFIG_IOAPIC
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uses CONFIG_ROM_STREAM
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uses CONFIG_ROM_STREAM_START
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uses CONFIG_SMP
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uses CONFIG_UDELAY_TSC
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uses CPU_FIXUP
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uses FALLBACK_SIZE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses i586
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uses i686
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uses INTEL_PPRO_MTRR
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uses HEAP_SIZE
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uses IRQ_SLOT_COUNT
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uses k7
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uses k8
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uses MAINBOARD
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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#uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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uses _ROMBASE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_SIZE
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uses ROM_SIZE
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uses STACK_SIZE
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uses USE_FALLBACK_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses CONFIG_CHIP_CONFIGURE
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uses CONFIG_CONSOLE_BTEXT
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uses CONFIG_CONSOLE_SERIAL8250
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uses TTYS0_BAUD
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEBUG
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uses CONFIG_MAX_CPUS
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uses CONFIG_LOGICAL_CPUS
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uses CONFIG_MAX_PHYSICAL_CPUS
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uses LINUXBIOS_EXTRA_VERSION
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses HAVE_HARD_RESET
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#
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#uses CONFIG_LSI_SCSI_FW_FIXUP
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mainboard Iwill/DK8S2
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option HAVE_HARD_RESET=1
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option HAVE_OPTION_TABLE=1
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option HAVE_MP_TABLE=1
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option CPU_FIXUP=1
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option CONFIG_UDELAY_TSC=0
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option i686=1
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option i586=1
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option INTEL_PPRO_MTRR=1
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option k7=1
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option k8=1
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option ROM_SIZE=1048576
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option CONFIG_CONSOLE_BTEXT=1
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option HAVE_FALLBACK_BOOT=1
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# use the new chip configure code.
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option CONFIG_CHIP_CONFIGURE=1
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#option CONFIG_LSI_SCSI_FW_FIXUP=1
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@ -98,7 +30,7 @@ option IRQ_SLOT_COUNT=12
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###
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option CONFIG_SMP=1
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option CONFIG_MAX_CPUS=2
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option CONFIG_LOGICAL_CPUS=2
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#option CONFIG_LOGICAL_CPUS=2
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option CONFIG_MAX_PHYSICAL_CPUS=2
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#
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###
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@ -142,7 +74,7 @@ option ROM_IMAGE_SIZE=65536
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###
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## We do use compressed image
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option CONFIG_COMPRESS=1
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#option CONFIG_COMPRESS=1
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option CONFIG_CONSOLE_SERIAL8250=1
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option TTYS0_BAUD=115200
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@ -165,7 +97,7 @@ option DEFAULT_CONSOLE_LOGLEVEL=7
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## At a maximum only compile in this level of debugging
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option MAXIMUM_CONSOLE_LOGLEVEL=7
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option DEBUG=1
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#option DEBUG=1
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#
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@ -210,7 +142,6 @@ romimage "normal"
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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mainboard Iwill/DK8S2
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payload /usr/src/filo-0.4.1_btext/filo.elf
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# payload /usr/src/filo-0.4.2/filo.elf
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end
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@ -229,8 +160,7 @@ romimage "fallback"
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option XIP_ROM_SIZE = 65536
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option XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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mainboard Iwill/DK8S2
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payload /usr/src/filo-0.4.1_btext/filo.elf
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payload ../../../payloads/filo.elf
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# payload /usr/src/filo-0.4.2/filo.elf
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end
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@ -2,77 +2,20 @@
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# Sample config file for Newisys Khepri systems
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#
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loadoptions
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# Target directory for khepri build
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target khepri
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# list of all used variables:
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uses ARCH
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uses CONFIG_COMPRESS
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uses CONFIG_IOAPIC
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uses CONFIG_ROM_STREAM
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uses CONFIG_ROM_STREAM_START
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uses CONFIG_UDELAY_TSC
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uses CPU_FIXUP
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uses FALLBACK_SIZE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses HAVE_HARD_RESET
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uses i586
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uses i686
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uses INTEL_PPRO_MTRR
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uses HEAP_SIZE
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uses IRQ_SLOT_COUNT
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uses k7
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uses k8
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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uses CONFIG_SMP
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uses CONFIG_MAX_CPUS
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uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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uses _ROMBASE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_SIZE
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uses ROM_SIZE
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uses STACK_SIZE
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uses USE_FALLBACK_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses CONFIG_CONSOLE_SERIAL8250
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uses MAINBOARD
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uses CONFIG_CHIP_CONFIGURE
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses LINUXBIOS_EXTRA_VERSION
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uses CC
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mainboard newisys/khepri
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# set target C compiler to 32bit gcc.
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option CC="gcc -m32"
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# Configuration options.
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option CONFIG_CHIP_CONFIGURE=1
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option MAXIMUM_CONSOLE_LOGLEVEL=8
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option DEFAULT_CONSOLE_LOGLEVEL=8
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option CONFIG_CONSOLE_SERIAL8250=1
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option CPU_FIXUP=1
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option CONFIG_UDELAY_TSC=0
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option i686=1
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option i586=1
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option INTEL_PPRO_MTRR=1
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option k7=1
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option k8=1
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# Size of the image. Khepri comes with 512k per default.
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option ROM_SIZE=524288
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@ -89,16 +32,14 @@ romimage "normal"
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option USE_FALLBACK_IMAGE=0
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option ROM_IMAGE_SIZE=0x10000
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option LINUXBIOS_EXTRA_VERSION="-Khepri-Normal"
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mainboard newisys/khepri
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payload /usr/share/LinuxBIOS/tg3--ide_disk.zelf
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payload ../../../payloads/tg3--ide_disk.zelf
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end
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romimage "fallback"
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option USE_FALLBACK_IMAGE=1
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option ROM_IMAGE_SIZE=0x10000
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option LINUXBIOS_EXTRA_VERSION="-Khepri-Fallback"
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mainboard newisys/khepri
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payload /usr/share/LinuxBIOS/tg3--ide_disk.zelf
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payload ../../../payloads/tg3--ide_disk.zelf
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end
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buildrom ./khepri.rom ROM_SIZE "normal" "fallback"
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@ -1,35 +1,9 @@
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# Config file for the Total Impact briQ
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# This will make a target directory of ./briq
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loadoptions
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target briq
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uses CROSS_COMPILE
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uses HAVE_OPTION_TABLE
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uses CONFIG_COMPRESS
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses CONFIG_USE_INIT
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uses NO_POST
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uses CONFIG_CONSOLE_SERIAL8250
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uses CONFIG_IDE_STREAM
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uses IDE_BOOT_DRIVE
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uses IDE_SWAB IDE_OFFSET
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uses ROM_SIZE
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uses _RESET
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uses _EXCEPTION_VECTORS
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uses _ROMBASE
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uses _ROMSTART
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uses _RAMBASE
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uses _RAMSTART
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uses STACK_SIZE
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uses HEAP_SIZE
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uses CONFIG_BRIQ_750FX
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uses CONFIG_BRIQ_7400
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## use a cross compiler
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#option CROSS_COMPILE="powerpc-eabi-"
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#option CROSS_COMPILE="ppc_74xx-"
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mainboard totalimpact/briq
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## Use stage 1 initialization code
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option CONFIG_USE_INIT=1
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@ -79,7 +53,6 @@ romimage "normal"
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option CONFIG_BRIQ_750FX=1
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#option CONFIG_BRIQ_7400=1
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mainboard totalimpact/briq
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end
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buildrom ./linuxbios.rom ROM_SIZE "normal"
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