Fix up Stumpy/Lumpy PEI data for system agent r6
Change-Id: I79937fd1671af23184ab830d5ba6242c8067d944 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/3831 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select SUPERIO_SMSC_MEC1308
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select DRIVERS_GENERIC_IOAPIC
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select EARLY_CBMEM_INIT
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select HAVE_MRC
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config MAINBOARD_DIR
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string
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@ -146,33 +146,33 @@ void main(unsigned long bist)
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.hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0)
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};
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#endif
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struct pei_data pei_data = {
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.pei_version = PEI_VERSION,
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.mchbar = DEFAULT_MCHBAR,
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.dmibar = DEFAULT_DMIBAR,
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.epbar = DEFAULT_EPBAR,
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.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
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.smbusbar = SMBUS_IO_BASE,
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.wdbbar = 0x4000000,
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.wdbsize = 0x1000,
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.hpet_address = CONFIG_HPET_ADDRESS,
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.rcba = DEFAULT_RCBABASE,
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.pmbase = DEFAULT_PMBASE,
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.gpiobase = DEFAULT_GPIOBASE,
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.thermalbase = 0xfed08000,
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.system_type = 0, // 0 Mobile, 1 Desktop/Server
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.tseg_size = CONFIG_SMM_TSEG_SIZE,
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.spd_addresses = { 0x50, 0x00,0xf0,0x00 },
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.ts_addresses = { 0x30, 0x00, 0x00, 0x00 },
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.ec_present = 1,
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pei_version: PEI_VERSION,
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mchbar: DEFAULT_MCHBAR,
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dmibar: DEFAULT_DMIBAR,
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epbar: DEFAULT_EPBAR,
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pciexbar: CONFIG_MMCONF_BASE_ADDRESS,
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smbusbar: SMBUS_IO_BASE,
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wdbbar: 0x4000000,
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wdbsize: 0x1000,
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hpet_address: CONFIG_HPET_ADDRESS,
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rcba: DEFAULT_RCBABASE,
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pmbase: DEFAULT_PMBASE,
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gpiobase: DEFAULT_GPIOBASE,
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thermalbase: 0xfed08000,
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system_type: 0, // 0 Mobile, 1 Desktop/Server
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tseg_size: CONFIG_SMM_TSEG_SIZE,
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spd_addresses: { 0xa0, 0x00,0x00,0x00 },
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ts_addresses: { 0x30, 0x00, 0x00, 0x00 },
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ec_present: 1,
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// 0 = leave channel enabled
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// 1 = disable dimm 0 on channel
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// 2 = disable dimm 1 on channel
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// 3 = disable dimm 0+1 on channel
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.dimm_channel0_disabled = 2,
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.dimm_channel1_disabled = 2,
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.usb_port_config = {
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dimm_channel0_disabled: 2,
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dimm_channel1_disabled: 2,
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max_ddr3_freq: 1333,
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usb_port_config: {
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{ 1, 0, 0x0080 }, /* P0: Port 0 (OC0) */
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{ 1, 1, 0x0080 }, /* P1: Port 1 (OC1) */
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{ 1, 0, 0x0040 }, /* P2: MINIPCIE1 (no OC) */
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@ -188,8 +188,6 @@ void main(unsigned long bist)
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{ 0, 4, 0x0000 }, /* P12: Empty */
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{ 0, 4, 0x0000 }, /* P13: Empty */
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},
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.spd_data = {
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}
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};
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typedef const uint8_t spd_blob[256];
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@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select SOUTHBRIDGE_INTEL_BD82X6X
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select SUPERIO_ITE_IT8772F
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select EARLY_CBMEM_INIT
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select HAVE_MRC
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config MAINBOARD_DIR
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string
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@ -198,7 +198,7 @@ void main(unsigned long bist)
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thermalbase: 0xfed08000,
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system_type: 0, // 0 Mobile, 1 Desktop/Server
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tseg_size: CONFIG_SMM_TSEG_SIZE,
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spd_addresses: { 0x50, 0x00,0x52,0x00 },
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spd_addresses: { 0xa0, 0x00,0xa4,0x00 },
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ts_addresses: { 0x00, 0x00, 0x00, 0x00 },
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ec_present: 0,
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// 0 = leave channel enabled
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@ -207,6 +207,7 @@ void main(unsigned long bist)
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// 3 = disable dimm 0+1 on channel
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dimm_channel0_disabled: 2,
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dimm_channel1_disabled: 2,
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max_ddr3_freq: 1333,
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usb_port_config: {
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{ 1, 0, 0x0080 }, /* P0: Front port (OC0) */
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{ 1, 1, 0x0040 }, /* P1: Back port (OC1) */
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