Fix up Stumpy/Lumpy PEI data for system agent r6

Change-Id: I79937fd1671af23184ab830d5ba6242c8067d944
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3831
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Stefan Reinauer 2013-07-29 14:02:06 -07:00 committed by Stefan Reinauer
parent 5bdcff5374
commit dedcc78ff4
4 changed files with 26 additions and 25 deletions

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@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_SMSC_MEC1308
select DRIVERS_GENERIC_IOAPIC
select EARLY_CBMEM_INIT
select HAVE_MRC
config MAINBOARD_DIR
string

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@ -146,33 +146,33 @@ void main(unsigned long bist)
.hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0)
};
#endif
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
.mchbar = DEFAULT_MCHBAR,
.dmibar = DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
.rcba = DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
.system_type = 0, // 0 Mobile, 1 Desktop/Server
.tseg_size = CONFIG_SMM_TSEG_SIZE,
.spd_addresses = { 0x50, 0x00,0xf0,0x00 },
.ts_addresses = { 0x30, 0x00, 0x00, 0x00 },
.ec_present = 1,
pei_version: PEI_VERSION,
mchbar: DEFAULT_MCHBAR,
dmibar: DEFAULT_DMIBAR,
epbar: DEFAULT_EPBAR,
pciexbar: CONFIG_MMCONF_BASE_ADDRESS,
smbusbar: SMBUS_IO_BASE,
wdbbar: 0x4000000,
wdbsize: 0x1000,
hpet_address: CONFIG_HPET_ADDRESS,
rcba: DEFAULT_RCBABASE,
pmbase: DEFAULT_PMBASE,
gpiobase: DEFAULT_GPIOBASE,
thermalbase: 0xfed08000,
system_type: 0, // 0 Mobile, 1 Desktop/Server
tseg_size: CONFIG_SMM_TSEG_SIZE,
spd_addresses: { 0xa0, 0x00,0x00,0x00 },
ts_addresses: { 0x30, 0x00, 0x00, 0x00 },
ec_present: 1,
// 0 = leave channel enabled
// 1 = disable dimm 0 on channel
// 2 = disable dimm 1 on channel
// 3 = disable dimm 0+1 on channel
.dimm_channel0_disabled = 2,
.dimm_channel1_disabled = 2,
.usb_port_config = {
dimm_channel0_disabled: 2,
dimm_channel1_disabled: 2,
max_ddr3_freq: 1333,
usb_port_config: {
{ 1, 0, 0x0080 }, /* P0: Port 0 (OC0) */
{ 1, 1, 0x0080 }, /* P1: Port 1 (OC1) */
{ 1, 0, 0x0040 }, /* P2: MINIPCIE1 (no OC) */
@ -188,8 +188,6 @@ void main(unsigned long bist)
{ 0, 4, 0x0000 }, /* P12: Empty */
{ 0, 4, 0x0000 }, /* P13: Empty */
},
.spd_data = {
}
};
typedef const uint8_t spd_blob[256];

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@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_BD82X6X
select SUPERIO_ITE_IT8772F
select EARLY_CBMEM_INIT
select HAVE_MRC
config MAINBOARD_DIR
string

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@ -198,7 +198,7 @@ void main(unsigned long bist)
thermalbase: 0xfed08000,
system_type: 0, // 0 Mobile, 1 Desktop/Server
tseg_size: CONFIG_SMM_TSEG_SIZE,
spd_addresses: { 0x50, 0x00,0x52,0x00 },
spd_addresses: { 0xa0, 0x00,0xa4,0x00 },
ts_addresses: { 0x00, 0x00, 0x00, 0x00 },
ec_present: 0,
// 0 = leave channel enabled
@ -207,6 +207,7 @@ void main(unsigned long bist)
// 3 = disable dimm 0+1 on channel
dimm_channel0_disabled: 2,
dimm_channel1_disabled: 2,
max_ddr3_freq: 1333,
usb_port_config: {
{ 1, 0, 0x0080 }, /* P0: Front port (OC0) */
{ 1, 1, 0x0040 }, /* P1: Back port (OC1) */