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pistashio: bump up romstage size 

Making large changes in pieces is leading to a little bloat.
Bump up the romstage size temporarily so that jenkins will be
happy.

Change-Id: I6f9facb4ca488cf41741a3ed6d0ed7f66d4778b3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10220
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Aaron Durbin 2015-05-15 16:54:17 -05:00
parent 807127f8cc
commit def0fb57df
1 changed files with 2 additions and 2 deletions
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4
src/soc/imgtec/pistachio/include/soc/memlayout.ld
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@ -38,8 +38,8 @@ SECTIONS
* and then through the identity mapping in ROM stage. * and then through the identity mapping in ROM stage.
*/ */
SRAM_START(0x1a000000) SRAM_START(0x1a000000)
ROMSTAGE(0x1a005000, 36K) ROMSTAGE(0x1a005000, 40K)
PRERAM_CBFS_CACHE(0x1a00e000, 72K) PRERAM_CBFS_CACHE(0x1a00f000, 68K)
SRAM_END(0x1a020000) SRAM_END(0x1a020000)
/* Bootblock executes out of KSEG0 and sets up the identity mapping. /* Bootblock executes out of KSEG0 and sets up the identity mapping.