From def33cc5bb4d37d1b7131c45ae064a648b88bdab Mon Sep 17 00:00:00 2001 From: Jonathon Hall Date: Wed, 16 Nov 2022 09:51:25 -0500 Subject: [PATCH] mb/purism/librem_14: Enable both lanes of left side USB 3.0 port Fixes using USB-C devices in either orientation on left-side USB-C port. Test: Plug USB-C device in both orientations on left-side USB-C port, check speed with lsusb -t. Change-Id: I9fbc53bb51a5225e92b0b6bb9ced87a0ab90c9ce Signed-off-by: Jonathon Hall Reviewed-on: https://review.coreboot.org/c/coreboot/+/69702 Reviewed-by: Paul Menzel Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- .../purism/librem_cnl/variants/librem_14/overridetree.cb | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb index b979740f8d..ef35ac099d 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb @@ -127,6 +127,7 @@ chip soc/intel/cannonlake register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A right register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A left register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-C right + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card Reader end